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forked from tanchou/Verilog

Code FPGA fonctionnel

This commit is contained in:
Gamenight77
2025-05-27 15:36:40 +02:00
parent 4e16bb3cbe
commit 168431849b
24 changed files with 2038 additions and 4 deletions

View File

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#!/bin/bash
# Charger l'environnement OSS CAD Suite
source /home/louis/oss-cad-suite/environment
mkdir -p runs
case "$1" in
sim)
bash scripts/linux/simulate.sh
;;
wave)
bash scripts/linux/gtkwave.sh
;;
clean)
bash scripts/linux/clean.sh
;;
build)
bash scripts/linux/build.sh
;;
*)
echo "Usage: $0 {sim|wave|clean|build}"
;;
esac