forked from tanchou/Verilog
Création de la structure du uart fifo
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6
Semaine_4/UART_FIFO/project.bat
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6
Semaine_4/UART_FIFO/project.bat
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@@ -0,0 +1,6 @@
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@call c:\oss-cad-suite\environment.bat
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@echo off
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if "%1"=="sim" call scripts\simulate.bat
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if "%1"=="wave" call scripts\gtkwave.bat
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if "%1"=="clean" call scripts\clean.bat
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if "%1"=="build" call scripts\build.bat
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