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Gamenight77
2025-05-12 15:34:02 +02:00
parent 790b85841b
commit 2cb68ce0d1
5 changed files with 38 additions and 30 deletions
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Semaine_5/UART_ULTRASON_COMMANDS/scripts/simulate.bat
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@@ -6,7 +6,7 @@ setlocal enabledelayedexpansion
set OUT=runs/sim.vvp
:: Top-level testbench module
set TOP=tb_uart_rx_fifo
set TOP=tb_ultrason_commands
:: Répertoires contenant des fichiers .v
set DIRS=src/verilog tests/verilog IP/verilog