forked from tanchou/Verilog
Init et début de réflexion sur le projet
This commit is contained in:
Gamenight77
@@ -0,0 +1,29 @@
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module distance_display_led (
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input wire [8:0] distance,
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output reg [5:0] leds
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);
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// Constante
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parameter MIN_DIST = 2;
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parameter MAX_DIST = 349;
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parameter LEVELS = 5;
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parameter PART_SIZE = (MAX_DIST - MIN_DIST + 1) / LEVELS;
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always @(*) begin
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if (distance <= MIN_DIST + PART_SIZE*0)
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leds = 6'b111111;
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else if (distance <= MIN_DIST + PART_SIZE*1)
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leds = 6'b111110;
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else if (distance <= MIN_DIST + PART_SIZE*2)
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leds = 6'b111100;
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else if (distance <= MIN_DIST + PART_SIZE*3)
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leds = 6'b111000;
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else if (distance <= MIN_DIST + PART_SIZE*4)
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leds = 6'b110000;
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else if (distance <= MIN_DIST + PART_SIZE*5)
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leds = 6'b100000;
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else
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leds = 6'b000000;
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end
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endmodule
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@@ -0,0 +1,212 @@
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$date
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Wed Apr 16 14:03:22 2025
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$end
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$version
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Icarus Verilog
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$end
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$timescale
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1s
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$end
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$scope module tb_distance_display_led $end
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$var wire 6 ! leds [5:0] $end
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$var reg 9 " distance [8:0] $end
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$var integer 32 # i [31:0] $end
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$scope module uut $end
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$var wire 9 $ distance [8:0] $end
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$var parameter 32 % LEVELS $end
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$var parameter 32 & MAX_DIST $end
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$var parameter 32 ' MIN_DIST $end
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$var parameter 34 ( PART_SIZE $end
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$var reg 6 ) leds [5:0] $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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$comment Show the parameter values. $end
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$dumpall
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b1000101 (
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b10 '
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b101011101 &
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b101 %
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$end
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#0
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$dumpvars
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b111111 )
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b0 $
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b0 #
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b0 "
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b111111 !
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$end
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#10
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b111110 !
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b111110 )
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b1010 "
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b1010 $
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b1010 #
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#20
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b10100 "
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b10100 $
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b10100 #
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#30
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b11110 "
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b11110 $
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b11110 #
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#40
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b101000 "
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b101000 $
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b101000 #
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#50
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b110010 "
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b110010 $
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b110010 #
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#60
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b111100 "
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b111100 $
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b111100 #
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#70
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b1000110 "
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b1000110 $
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b1000110 #
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#80
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b111100 !
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b111100 )
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b1010000 "
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b1010000 $
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b1010000 #
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#90
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b1011010 "
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b1011010 $
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b1011010 #
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#100
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b1100100 "
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b1100100 $
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b1100100 #
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#110
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b1101110 "
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b1101110 $
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b1101110 #
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#120
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b1111000 "
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b1111000 $
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b1111000 #
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#130
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b10000010 "
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b10000010 $
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b10000010 #
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#140
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b10001100 "
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b10001100 $
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b10001100 #
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#150
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b111000 !
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b111000 )
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b10010110 "
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b10010110 $
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b10010110 #
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#160
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b10100000 "
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b10100000 $
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b10100000 #
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#170
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b10101010 "
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b10101010 $
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b10101010 #
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#180
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b10110100 "
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b10110100 $
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b10110100 #
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#190
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b10111110 "
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b10111110 $
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b10111110 #
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#200
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b11001000 "
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b11001000 $
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b11001000 #
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#210
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b110000 !
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b110000 )
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b11010010 "
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b11010010 $
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b11010010 #
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#220
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b11011100 "
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b11011100 $
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b11011100 #
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#230
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b11100110 "
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b11100110 $
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b11100110 #
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#240
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b11110000 "
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b11110000 $
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b11110000 #
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#250
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b11111010 "
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b11111010 $
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b11111010 #
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#260
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b100000100 "
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b100000100 $
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b100000100 #
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#270
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b100001110 "
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b100001110 $
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b100001110 #
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#280
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b100000 !
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b100000 )
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b100011000 "
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b100011000 $
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b100011000 #
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#290
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b100100010 "
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b100100010 $
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b100100010 #
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#300
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b100101100 "
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b100101100 $
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b100101100 #
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#310
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b100110110 "
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b100110110 $
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b100110110 #
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#320
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b101000000 "
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b101000000 $
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b101000000 #
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#330
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b101001010 "
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b101001010 $
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b101001010 #
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#340
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b101010100 "
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b101010100 $
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b101010100 #
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#350
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b0 !
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b0 )
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b101011110 "
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b101011110 $
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b101011110 #
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#360
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b101101000 "
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b101101000 $
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b101101000 #
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#370
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b101110010 "
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b101110010 $
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b101110010 #
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#380
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b101111100 "
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b101111100 $
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b101111100 #
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#390
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b110000110 "
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b110000110 $
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b110000110 #
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#400
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b110010000 "
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b110010000 $
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b110010000 #
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#410
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b110011010 #
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@@ -0,0 +1,123 @@
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#!
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:ivl_version "13.0 (devel)" "(s20250103-31-g7e238e7ca-dirty)";
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:ivl_delay_selection "TYPICAL";
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:vpi_time_precision + 0;
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:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\system.vpi";
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:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_sys.vpi";
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:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_textio.vpi";
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:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\v2005_math.vpi";
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:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\va_math.vpi";
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S_000001b2514bb620 .scope module, "tb_distance_display_led" "tb_distance_display_led" 2 1;
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.timescale 0 0;
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v000001b2514bbe50_0 .var "distance", 8 0;
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v000001b2514bbef0_0 .var/i "i", 31 0;
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v000001b2515d8150_0 .net "leds", 5 0, v000001b2514be0e0_0; 1 drivers
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S_000001b2514bbb30 .scope module, "uut" "distance_display_led" 2 5, 3 1 0, S_000001b2514bb620;
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.timescale 0 0;
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.port_info 0 /INPUT 9 "distance";
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.port_info 1 /OUTPUT 6 "leds";
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P_000001b2514bbcc0 .param/l "LEVELS" 0 3 9, +C4<00000000000000000000000000000101>;
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P_000001b2514bbcf8 .param/l "MAX_DIST" 0 3 8, +C4<00000000000000000000000101011101>;
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P_000001b2514bbd30 .param/l "MIN_DIST" 0 3 7, +C4<00000000000000000000000000000010>;
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P_000001b2514bbd68 .param/l "PART_SIZE" 0 3 10, +C4<0000000000000000000000000001000101>;
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v000001b2514bbdb0_0 .net "distance", 8 0, v000001b2514bbe50_0; 1 drivers
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v000001b2514be0e0_0 .var "leds", 5 0;
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E_000001b2515c8c00 .event anyedge, v000001b2514bbdb0_0;
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.scope S_000001b2514bbb30;
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T_0 ;
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%wait E_000001b2515c8c00;
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%load/vec4 v000001b2514bbdb0_0;
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%pad/u 34;
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%cmpi/u 2, 0, 34;
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%flag_or 5, 4;
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%jmp/0xz T_0.0, 5;
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%pushi/vec4 63, 0, 6;
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%store/vec4 v000001b2514be0e0_0, 0, 6;
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%jmp T_0.1;
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T_0.0 ;
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%load/vec4 v000001b2514bbdb0_0;
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%pad/u 34;
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%cmpi/u 71, 0, 34;
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%flag_or 5, 4;
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%jmp/0xz T_0.2, 5;
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%pushi/vec4 62, 0, 6;
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%store/vec4 v000001b2514be0e0_0, 0, 6;
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%jmp T_0.3;
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T_0.2 ;
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%load/vec4 v000001b2514bbdb0_0;
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%pad/u 34;
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%cmpi/u 140, 0, 34;
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%flag_or 5, 4;
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%jmp/0xz T_0.4, 5;
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%pushi/vec4 60, 0, 6;
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%store/vec4 v000001b2514be0e0_0, 0, 6;
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%jmp T_0.5;
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T_0.4 ;
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%load/vec4 v000001b2514bbdb0_0;
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%pad/u 34;
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%cmpi/u 209, 0, 34;
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%flag_or 5, 4;
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%jmp/0xz T_0.6, 5;
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%pushi/vec4 56, 0, 6;
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%store/vec4 v000001b2514be0e0_0, 0, 6;
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%jmp T_0.7;
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T_0.6 ;
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%load/vec4 v000001b2514bbdb0_0;
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%pad/u 34;
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%cmpi/u 278, 0, 34;
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%flag_or 5, 4;
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%jmp/0xz T_0.8, 5;
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%pushi/vec4 48, 0, 6;
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%store/vec4 v000001b2514be0e0_0, 0, 6;
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%jmp T_0.9;
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T_0.8 ;
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%load/vec4 v000001b2514bbdb0_0;
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%pad/u 34;
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%cmpi/u 347, 0, 34;
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%flag_or 5, 4;
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%jmp/0xz T_0.10, 5;
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%pushi/vec4 32, 0, 6;
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%store/vec4 v000001b2514be0e0_0, 0, 6;
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%jmp T_0.11;
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T_0.10 ;
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%pushi/vec4 0, 0, 6;
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%store/vec4 v000001b2514be0e0_0, 0, 6;
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T_0.11 ;
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T_0.9 ;
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T_0.7 ;
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T_0.5 ;
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T_0.3 ;
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T_0.1 ;
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%jmp T_0;
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.thread T_0, $push;
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.scope S_000001b2514bb620;
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T_1 ;
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%vpi_call 2 13 "$dumpfile", "distance_display_led.vcd" {0 0 0};
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%vpi_call 2 14 "$dumpvars", 32'sb00000000000000000000000000000000, S_000001b2514bb620 {0 0 0};
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%pushi/vec4 0, 0, 32;
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%store/vec4 v000001b2514bbef0_0, 0, 32;
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T_1.0 ; Top of for-loop
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%load/vec4 v000001b2514bbef0_0;
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%cmpi/s 400, 0, 32;
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%flag_or 5, 4;
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%jmp/0xz T_1.1, 5;
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%load/vec4 v000001b2514bbef0_0;
|
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%pad/s 9;
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%store/vec4 v000001b2514bbe50_0, 0, 9;
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%delay 10, 0;
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%vpi_call 2 20 "$display", "Distance: %3d cm => LEDs: %b", v000001b2514bbe50_0, v000001b2515d8150_0 {0 0 0};
|
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T_1.2 ; for-loop step statement
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%load/vec4 v000001b2514bbef0_0;
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%addi 10, 0, 32;
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%store/vec4 v000001b2514bbef0_0, 0, 32;
|
||||
%jmp T_1.0;
|
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T_1.1 ; for-loop exit label
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%vpi_call 2 23 "$finish" {0 0 0};
|
||||
%end;
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.thread T_1;
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# The file index is used to find the file name in the following table.
|
||||
:file_names 4;
|
||||
"N/A";
|
||||
"<interactive>";
|
||||
"tb_distance_display_led.v";
|
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"distance_display_led.v";
|
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@@ -0,0 +1,26 @@
|
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module tb_distance_display_led;
|
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reg [8:0] distance;
|
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wire [5:0] leds;
|
||||
|
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distance_display_led uut (
|
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.distance(distance),
|
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.leds(leds)
|
||||
);
|
||||
|
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integer i;
|
||||
|
||||
initial begin
|
||||
$dumpfile("distance_display_led.vcd");
|
||||
$dumpvars(0, tb_distance_display_led);
|
||||
|
||||
// Test de la conversion de distance en LED
|
||||
for (i = 0; i <= 380; i = i + 10) begin
|
||||
distance = i;
|
||||
#10;
|
||||
$display("Distance: %3d cm => LEDs: %b", distance, leds);
|
||||
end
|
||||
|
||||
$finish;
|
||||
end
|
||||
|
||||
endmodule
|
||||
@@ -0,0 +1,73 @@
|
||||
`timescale 1ns/1ps
|
||||
|
||||
module tb_ultrasonic_fpga;
|
||||
|
||||
reg clk = 0;
|
||||
reg rst = 1;
|
||||
reg start = 0;
|
||||
reg echo = 0;
|
||||
wire trig_out;
|
||||
wire [8:0] distance;
|
||||
|
||||
time t_start, t_end;
|
||||
|
||||
// Clock 27MHz => periode = 37ns
|
||||
always #18 clk = ~clk;
|
||||
|
||||
ultrasonic_fpga uut (
|
||||
.clk(clk),
|
||||
.rst(rst),
|
||||
.start(start),
|
||||
.echo(echo),
|
||||
.trig_out(trig_out),
|
||||
.distance(distance)
|
||||
);
|
||||
|
||||
initial begin
|
||||
$dumpfile("ultrasonic.vcd");
|
||||
$dumpvars(0, tb_ultrasonic_fpga);
|
||||
|
||||
// Reset
|
||||
#100;
|
||||
rst = 0;
|
||||
|
||||
// Start
|
||||
#100;
|
||||
start = 1;
|
||||
#40;
|
||||
start = 0;
|
||||
|
||||
wait (trig_out == 1);
|
||||
t_start = $time;
|
||||
|
||||
// Attendre qu'il redescende
|
||||
wait (trig_out == 0);
|
||||
t_end = $time;
|
||||
|
||||
$display("Trig HIGH duration: %0dns", t_end - t_start);
|
||||
|
||||
if ((t_end - t_start) >= 9500 && (t_end - t_start) <= 10500) begin
|
||||
$display("Trigger signal is high for 10us.");
|
||||
|
||||
#10;
|
||||
echo = 1;
|
||||
|
||||
#5800;// Echo dure 5800ns (≈ 100 cycles @ 27MHz => ≈ 100 cm aller-retour)
|
||||
echo = 0;
|
||||
end else begin
|
||||
$display("Trigger signal is NOT high for 10us.");
|
||||
end
|
||||
|
||||
#500;
|
||||
|
||||
// Affiche la distance
|
||||
if (distance > 0) begin
|
||||
$display("Distance measured: %d cm", distance);
|
||||
end else begin
|
||||
$display("No distance measured.");
|
||||
end
|
||||
|
||||
$finish;
|
||||
end
|
||||
|
||||
endmodule
|
||||
2328
Semaine_1/Capteur_recule_avec_deux_broche/Ultrasonic/ultrasonic.vcd
Normal file
2328
Semaine_1/Capteur_recule_avec_deux_broche/Ultrasonic/ultrasonic.vcd
Normal file
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,71 @@
|
||||
module ultrasonic_fpga #(
|
||||
parameter integer CLK_FREQ = 27_000_000 // frequence de clk en Hz
|
||||
)(
|
||||
input wire clk,
|
||||
input wire rst,
|
||||
input wire start, // signal de declenchement
|
||||
input wire echo, // retour du capteur
|
||||
output reg trig_out, // signal envoye au capteur
|
||||
output reg [8:0] distance // distance mesuree
|
||||
);
|
||||
|
||||
reg [2:0] state;
|
||||
reg [8:0] trig_counter;
|
||||
reg [15:0] echo_counter;
|
||||
|
||||
localparam IDLE = 0, TRIG = 1, WAIT_ECHO = 2, MEASURE_ECHO = 3, DONE = 4;
|
||||
|
||||
// Constantes dépendantes de CLK_FREQ
|
||||
localparam integer TRIG_DURATION_CYCLES = CLK_FREQ / 100_000; // 10us
|
||||
localparam integer DIST_DIVISOR = (58 * CLK_FREQ) / 1_000_000; // pour conversion µs -> cm
|
||||
|
||||
always @(posedge clk or posedge rst) begin
|
||||
if (rst) begin
|
||||
state <= IDLE;
|
||||
trig_out <= 0;
|
||||
trig_counter <= 0;
|
||||
echo_counter <= 0;
|
||||
distance <= 0;
|
||||
end else begin
|
||||
case (state)
|
||||
IDLE: begin
|
||||
if (start) begin
|
||||
state <= TRIG;
|
||||
end
|
||||
end
|
||||
|
||||
TRIG: begin
|
||||
if (trig_counter < TRIG_DURATION_CYCLES) begin
|
||||
trig_out <= 1;
|
||||
trig_counter <= trig_counter + 1;
|
||||
end else begin
|
||||
trig_out <= 0;
|
||||
trig_counter <= 0;
|
||||
state <= WAIT_ECHO;
|
||||
end
|
||||
end
|
||||
|
||||
WAIT_ECHO: begin
|
||||
if (echo) begin
|
||||
echo_counter <= 0;
|
||||
state <= MEASURE_ECHO;
|
||||
end
|
||||
end
|
||||
|
||||
MEASURE_ECHO: begin
|
||||
if (echo) begin
|
||||
echo_counter <= echo_counter + 1;
|
||||
end else begin
|
||||
distance <= (echo_counter*1000) / DIST_DIVISOR;
|
||||
state <= DONE;
|
||||
end
|
||||
end
|
||||
|
||||
DONE: begin
|
||||
state <= IDLE;
|
||||
end
|
||||
endcase
|
||||
end
|
||||
end
|
||||
|
||||
endmodule
|
||||
@@ -0,0 +1,265 @@
|
||||
#!
|
||||
:ivl_version "13.0 (devel)" "(s20250103-31-g7e238e7ca-dirty)";
|
||||
:ivl_delay_selection "TYPICAL";
|
||||
:vpi_time_precision - 12;
|
||||
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\system.vpi";
|
||||
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_sys.vpi";
|
||||
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_textio.vpi";
|
||||
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\v2005_math.vpi";
|
||||
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\va_math.vpi";
|
||||
S_000002569854ec30 .scope module, "tb_ultrasonic_fpga" "tb_ultrasonic_fpga" 2 3;
|
||||
.timescale -9 -12;
|
||||
v00000256985b7a50_0 .var "clk", 0 0;
|
||||
v00000256985b72d0_0 .net "distance", 15 0, v000002569854e7f0_0; 1 drivers
|
||||
v00000256985b7870_0 .var "echo", 0 0;
|
||||
v00000256985b7cd0_0 .var "rst", 0 0;
|
||||
v00000256985b7f50_0 .var "start", 0 0;
|
||||
v00000256985b7910_0 .var "t_end", 63 0;
|
||||
v00000256985b7af0_0 .var "t_start", 63 0;
|
||||
v00000256985b7d70_0 .net "trig_out", 0 0, v00000256985b7370_0; 1 drivers
|
||||
E_000002569854ae50 .event anyedge, v00000256985b7370_0;
|
||||
S_000002569854edc0 .scope module, "uut" "ultrasonic_fpga" 2 17, 3 1 0, S_000002569854ec30;
|
||||
.timescale 0 0;
|
||||
.port_info 0 /INPUT 1 "clk";
|
||||
.port_info 1 /INPUT 1 "rst";
|
||||
.port_info 2 /INPUT 1 "start";
|
||||
.port_info 3 /INPUT 1 "echo";
|
||||
.port_info 4 /OUTPUT 1 "trig_out";
|
||||
.port_info 5 /OUTPUT 16 "distance";
|
||||
P_0000025698560660 .param/l "CLK_FREQ" 0 3 2, +C4<00000001100110111111110011000000>;
|
||||
P_0000025698560698 .param/l "DIST_DIVISOR" 1 3 20, +C4<00000000000000000000000000000001>;
|
||||
P_00000256985606d0 .param/l "DONE" 1 3 16, +C4<00000000000000000000000000000100>;
|
||||
P_0000025698560708 .param/l "IDLE" 1 3 16, +C4<00000000000000000000000000000000>;
|
||||
P_0000025698560740 .param/l "MEASURE_ECHO" 1 3 16, +C4<00000000000000000000000000000011>;
|
||||
P_0000025698560778 .param/l "TRIG" 1 3 16, +C4<00000000000000000000000000000001>;
|
||||
P_00000256985607b0 .param/l "TRIG_DURATION_CYCLES" 1 3 19, +C4<00000000000000000000000100001110>;
|
||||
P_00000256985607e8 .param/l "WAIT_ECHO" 1 3 16, +C4<00000000000000000000000000000010>;
|
||||
v000002569854ef50_0 .net "clk", 0 0, v00000256985b7a50_0; 1 drivers
|
||||
v000002569854e7f0_0 .var "distance", 15 0;
|
||||
v000002569854c1a0_0 .net "echo", 0 0, v00000256985b7870_0; 1 drivers
|
||||
v00000256985b74b0_0 .var "echo_counter", 15 0;
|
||||
v00000256985b7b90_0 .net "rst", 0 0, v00000256985b7cd0_0; 1 drivers
|
||||
v00000256985b7c30_0 .net "start", 0 0, v00000256985b7f50_0; 1 drivers
|
||||
v00000256985b7050_0 .var "state", 2 0;
|
||||
v00000256985b77d0_0 .var "trig_counter", 8 0;
|
||||
v00000256985b7370_0 .var "trig_out", 0 0;
|
||||
E_000002569854af10 .event posedge, v00000256985b7b90_0, v000002569854ef50_0;
|
||||
.scope S_000002569854edc0;
|
||||
T_0 ;
|
||||
%wait E_000002569854af10;
|
||||
%load/vec4 v00000256985b7b90_0;
|
||||
%flag_set/vec4 8;
|
||||
%jmp/0xz T_0.0, 8;
|
||||
%pushi/vec4 0, 0, 3;
|
||||
%assign/vec4 v00000256985b7050_0, 0;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%assign/vec4 v00000256985b7370_0, 0;
|
||||
%pushi/vec4 0, 0, 9;
|
||||
%assign/vec4 v00000256985b77d0_0, 0;
|
||||
%pushi/vec4 0, 0, 16;
|
||||
%assign/vec4 v00000256985b74b0_0, 0;
|
||||
%pushi/vec4 0, 0, 16;
|
||||
%assign/vec4 v000002569854e7f0_0, 0;
|
||||
%jmp T_0.1;
|
||||
T_0.0 ;
|
||||
%load/vec4 v00000256985b7050_0;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 0, 0, 3;
|
||||
%cmp/u;
|
||||
%jmp/1 T_0.2, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 1, 0, 3;
|
||||
%cmp/u;
|
||||
%jmp/1 T_0.3, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 2, 0, 3;
|
||||
%cmp/u;
|
||||
%jmp/1 T_0.4, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 3, 0, 3;
|
||||
%cmp/u;
|
||||
%jmp/1 T_0.5, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 4, 0, 3;
|
||||
%cmp/u;
|
||||
%jmp/1 T_0.6, 6;
|
||||
%jmp T_0.7;
|
||||
T_0.2 ;
|
||||
%load/vec4 v00000256985b7c30_0;
|
||||
%flag_set/vec4 8;
|
||||
%jmp/0xz T_0.8, 8;
|
||||
%pushi/vec4 1, 0, 3;
|
||||
%assign/vec4 v00000256985b7050_0, 0;
|
||||
T_0.8 ;
|
||||
%jmp T_0.7;
|
||||
T_0.3 ;
|
||||
%load/vec4 v00000256985b77d0_0;
|
||||
%pad/u 32;
|
||||
%cmpi/u 270, 0, 32;
|
||||
%jmp/0xz T_0.10, 5;
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%assign/vec4 v00000256985b7370_0, 0;
|
||||
%load/vec4 v00000256985b77d0_0;
|
||||
%addi 1, 0, 9;
|
||||
%assign/vec4 v00000256985b77d0_0, 0;
|
||||
%jmp T_0.11;
|
||||
T_0.10 ;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%assign/vec4 v00000256985b7370_0, 0;
|
||||
%pushi/vec4 0, 0, 9;
|
||||
%assign/vec4 v00000256985b77d0_0, 0;
|
||||
%pushi/vec4 2, 0, 3;
|
||||
%assign/vec4 v00000256985b7050_0, 0;
|
||||
T_0.11 ;
|
||||
%jmp T_0.7;
|
||||
T_0.4 ;
|
||||
%load/vec4 v000002569854c1a0_0;
|
||||
%flag_set/vec4 8;
|
||||
%jmp/0xz T_0.12, 8;
|
||||
%pushi/vec4 0, 0, 16;
|
||||
%assign/vec4 v00000256985b74b0_0, 0;
|
||||
%pushi/vec4 3, 0, 3;
|
||||
%assign/vec4 v00000256985b7050_0, 0;
|
||||
T_0.12 ;
|
||||
%jmp T_0.7;
|
||||
T_0.5 ;
|
||||
%load/vec4 v000002569854c1a0_0;
|
||||
%flag_set/vec4 8;
|
||||
%jmp/0xz T_0.14, 8;
|
||||
%load/vec4 v00000256985b74b0_0;
|
||||
%addi 1, 0, 16;
|
||||
%assign/vec4 v00000256985b74b0_0, 0;
|
||||
%jmp T_0.15;
|
||||
T_0.14 ;
|
||||
%load/vec4 v00000256985b74b0_0;
|
||||
%pad/u 32;
|
||||
%pushi/vec4 1, 0, 32;
|
||||
%div;
|
||||
%pad/u 16;
|
||||
%assign/vec4 v000002569854e7f0_0, 0;
|
||||
%pushi/vec4 4, 0, 3;
|
||||
%assign/vec4 v00000256985b7050_0, 0;
|
||||
T_0.15 ;
|
||||
%jmp T_0.7;
|
||||
T_0.6 ;
|
||||
%pushi/vec4 0, 0, 3;
|
||||
%assign/vec4 v00000256985b7050_0, 0;
|
||||
%jmp T_0.7;
|
||||
T_0.7 ;
|
||||
%pop/vec4 1;
|
||||
T_0.1 ;
|
||||
%jmp T_0;
|
||||
.thread T_0;
|
||||
.scope S_000002569854ec30;
|
||||
T_1 ;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v00000256985b7a50_0, 0, 1;
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%store/vec4 v00000256985b7cd0_0, 0, 1;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v00000256985b7f50_0, 0, 1;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v00000256985b7870_0, 0, 1;
|
||||
%end;
|
||||
.thread T_1;
|
||||
.scope S_000002569854ec30;
|
||||
T_2 ;
|
||||
%delay 18000, 0;
|
||||
%load/vec4 v00000256985b7a50_0;
|
||||
%inv;
|
||||
%store/vec4 v00000256985b7a50_0, 0, 1;
|
||||
%jmp T_2;
|
||||
.thread T_2;
|
||||
.scope S_000002569854ec30;
|
||||
T_3 ;
|
||||
%vpi_call 2 27 "$dumpfile", "ultrasonic.vcd" {0 0 0};
|
||||
%vpi_call 2 28 "$dumpvars", 32'sb00000000000000000000000000000000, S_000002569854ec30 {0 0 0};
|
||||
%delay 100000, 0;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v00000256985b7cd0_0, 0, 1;
|
||||
%delay 100000, 0;
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%store/vec4 v00000256985b7f50_0, 0, 1;
|
||||
%delay 40000, 0;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v00000256985b7f50_0, 0, 1;
|
||||
T_3.0 ;
|
||||
%load/vec4 v00000256985b7d70_0;
|
||||
%pad/u 32;
|
||||
%pushi/vec4 1, 0, 32;
|
||||
%cmp/e;
|
||||
%flag_get/vec4 4;
|
||||
%cmpi/ne 1, 0, 1;
|
||||
%jmp/0xz T_3.1, 6;
|
||||
%wait E_000002569854ae50;
|
||||
%jmp T_3.0;
|
||||
T_3.1 ;
|
||||
%vpi_func 2 41 "$time" 64 {0 0 0};
|
||||
%store/vec4 v00000256985b7af0_0, 0, 64;
|
||||
T_3.2 ;
|
||||
%load/vec4 v00000256985b7d70_0;
|
||||
%pad/u 32;
|
||||
%pushi/vec4 0, 0, 32;
|
||||
%cmp/e;
|
||||
%flag_get/vec4 4;
|
||||
%cmpi/ne 1, 0, 1;
|
||||
%jmp/0xz T_3.3, 6;
|
||||
%wait E_000002569854ae50;
|
||||
%jmp T_3.2;
|
||||
T_3.3 ;
|
||||
%vpi_func 2 45 "$time" 64 {0 0 0};
|
||||
%store/vec4 v00000256985b7910_0, 0, 64;
|
||||
%load/vec4 v00000256985b7910_0;
|
||||
%load/vec4 v00000256985b7af0_0;
|
||||
%sub;
|
||||
%vpi_call 2 47 "$display", "Trig HIGH duration: %0dns", S<0,vec4,u64> {1 0 0};
|
||||
%load/vec4 v00000256985b7910_0;
|
||||
%load/vec4 v00000256985b7af0_0;
|
||||
%sub;
|
||||
%cmpi/u 9500, 0, 64;
|
||||
%flag_inv 5; GE is !LT
|
||||
%flag_get/vec4 5;
|
||||
%jmp/0 T_3.6, 5;
|
||||
%load/vec4 v00000256985b7910_0;
|
||||
%load/vec4 v00000256985b7af0_0;
|
||||
%sub;
|
||||
%cmpi/u 10500, 0, 64;
|
||||
%flag_get/vec4 4;
|
||||
%flag_get/vec4 5;
|
||||
%or;
|
||||
%and;
|
||||
T_3.6;
|
||||
%flag_set/vec4 8;
|
||||
%jmp/0xz T_3.4, 8;
|
||||
%vpi_call 2 50 "$display", "Trigger signal is high for 10us." {0 0 0};
|
||||
%delay 10000, 0;
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%store/vec4 v00000256985b7870_0, 0, 1;
|
||||
%delay 5800000, 0;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v00000256985b7870_0, 0, 1;
|
||||
%jmp T_3.5;
|
||||
T_3.4 ;
|
||||
%vpi_call 2 58 "$display", "Trigger signal is NOT high for 10us." {0 0 0};
|
||||
T_3.5 ;
|
||||
%delay 500000, 0;
|
||||
%load/vec4 v00000256985b72d0_0;
|
||||
%pad/u 32;
|
||||
%cmpi/u 0, 0, 32;
|
||||
%flag_or 5, 4; GT is !LE
|
||||
%flag_inv 5;
|
||||
%jmp/0xz T_3.7, 5;
|
||||
%vpi_call 2 65 "$display", "Distance measured: %d cm", v00000256985b72d0_0 {0 0 0};
|
||||
%jmp T_3.8;
|
||||
T_3.7 ;
|
||||
%vpi_call 2 67 "$display", "No distance measured." {0 0 0};
|
||||
T_3.8 ;
|
||||
%vpi_call 2 70 "$finish" {0 0 0};
|
||||
%end;
|
||||
.thread T_3;
|
||||
# The file index is used to find the file name in the following table.
|
||||
:file_names 4;
|
||||
"N/A";
|
||||
"<interactive>";
|
||||
"tb_ultrasonic_fpga.v";
|
||||
"ultrasonic_fpga.v";
|
||||
@@ -0,0 +1,61 @@
|
||||
`timescale 1ns/1ps
|
||||
|
||||
module tb_top_ultrasonic_led;
|
||||
|
||||
reg clk;
|
||||
reg rst;
|
||||
reg start;
|
||||
reg echo;
|
||||
wire trig;
|
||||
wire [5:0] leds;
|
||||
|
||||
// Instance du module top
|
||||
top_ultrasonic_led uut (
|
||||
.clk(clk),
|
||||
.rst(rst),
|
||||
.start(start),
|
||||
.echo(echo),
|
||||
.trig(trig),
|
||||
.leds(leds)
|
||||
);
|
||||
|
||||
always #18.5 clk = ~clk;
|
||||
|
||||
initial begin
|
||||
// Initialisation
|
||||
$dumpfile("top_ultrasonic_led.vcd");
|
||||
$dumpvars(0, tb_top_ultrasonic_led);
|
||||
|
||||
clk = 0;
|
||||
rst = 1;
|
||||
start = 0;
|
||||
echo = 0;
|
||||
|
||||
#100;
|
||||
rst = 0;
|
||||
|
||||
#50;
|
||||
start = 1;
|
||||
#20;
|
||||
start = 0;
|
||||
|
||||
// Attente du signal trig
|
||||
wait (trig == 1);
|
||||
$display("TRIG HIGH at %t", $time);
|
||||
wait (trig == 0);
|
||||
$display("TRIG LOW at %t", $time);
|
||||
|
||||
repeat (500) @(posedge clk);
|
||||
echo = 1;
|
||||
#12000
|
||||
|
||||
echo = 0;
|
||||
|
||||
repeat (500) @(posedge clk);
|
||||
|
||||
$display("Leds allumer : %b", leds);
|
||||
|
||||
$finish;
|
||||
end
|
||||
|
||||
endmodule
|
||||
@@ -0,0 +1,28 @@
|
||||
module top_ultrasonic_led (
|
||||
input wire clk,
|
||||
input wire rst,
|
||||
input wire start, // bouton ou signal de départ
|
||||
input wire echo, // signal du capteur
|
||||
output wire trig, // vers le capteur
|
||||
output wire [5:0] leds // sorties LED
|
||||
);
|
||||
|
||||
wire [8:0] distance;
|
||||
|
||||
// Module de mesure de distance
|
||||
ultrasonic_fpga ultrasonic_inst (
|
||||
.clk(clk),
|
||||
.rst(rst),
|
||||
.start(start),
|
||||
.echo(echo),
|
||||
.trig_out(trig),
|
||||
.distance(distance)
|
||||
);
|
||||
|
||||
// Module d'affichage leds
|
||||
distance_display_led led_display_inst (
|
||||
.distance(distance),
|
||||
.leds(leds)
|
||||
);
|
||||
|
||||
endmodule
|
||||
7911
Semaine_1/Capteur_recule_avec_deux_broche/top_ultrasonic_led.vcd
Normal file
7911
Semaine_1/Capteur_recule_avec_deux_broche/top_ultrasonic_led.vcd
Normal file
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,335 @@
|
||||
#!
|
||||
:ivl_version "13.0 (devel)" "(s20250103-31-g7e238e7ca-dirty)";
|
||||
:ivl_delay_selection "TYPICAL";
|
||||
:vpi_time_precision - 12;
|
||||
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\system.vpi";
|
||||
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_sys.vpi";
|
||||
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_textio.vpi";
|
||||
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\v2005_math.vpi";
|
||||
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\va_math.vpi";
|
||||
S_0000016babb102e0 .scope module, "tb_top_ultrasonic_led" "tb_top_ultrasonic_led" 2 3;
|
||||
.timescale -9 -12;
|
||||
v0000016babb7abc0_0 .var "clk", 0 0;
|
||||
v0000016babb7ada0_0 .var "echo", 0 0;
|
||||
v0000016babb7a580_0 .net "leds", 5 0, v0000016babb0e8e0_0; 1 drivers
|
||||
v0000016babb7a260_0 .var "rst", 0 0;
|
||||
v0000016babb7a620_0 .var "start", 0 0;
|
||||
v0000016babb7a760_0 .net "trig", 0 0, v0000016babb7a120_0; 1 drivers
|
||||
E_0000016babb0c2a0 .event posedge, v0000016babb7a4e0_0;
|
||||
E_0000016babb0c320 .event anyedge, v0000016babb7a120_0;
|
||||
S_0000016babae6610 .scope module, "uut" "top_ultrasonic_led" 2 13, 3 1 0, S_0000016babb102e0;
|
||||
.timescale 0 0;
|
||||
.port_info 0 /INPUT 1 "clk";
|
||||
.port_info 1 /INPUT 1 "rst";
|
||||
.port_info 2 /INPUT 1 "start";
|
||||
.port_info 3 /INPUT 1 "echo";
|
||||
.port_info 4 /OUTPUT 1 "trig";
|
||||
.port_info 5 /OUTPUT 6 "leds";
|
||||
v0000016babb7ab20_0 .net "clk", 0 0, v0000016babb7abc0_0; 1 drivers
|
||||
v0000016babb7af80_0 .net "distance", 8 0, v0000016babb7a440_0; 1 drivers
|
||||
v0000016babb7a6c0_0 .net "echo", 0 0, v0000016babb7ada0_0; 1 drivers
|
||||
v0000016babb7a800_0 .net "leds", 5 0, v0000016babb0e8e0_0; alias, 1 drivers
|
||||
v0000016babb7ac60_0 .net "rst", 0 0, v0000016babb7a260_0; 1 drivers
|
||||
v0000016babb7a9e0_0 .net "start", 0 0, v0000016babb7a620_0; 1 drivers
|
||||
v0000016babb7aa80_0 .net "trig", 0 0, v0000016babb7a120_0; alias, 1 drivers
|
||||
S_0000016babae67a0 .scope module, "led_display_inst" "distance_display_led" 3 23, 4 1 0, S_0000016babae6610;
|
||||
.timescale 0 0;
|
||||
.port_info 0 /INPUT 9 "distance";
|
||||
.port_info 1 /OUTPUT 6 "leds";
|
||||
P_0000016babae6930 .param/l "LEVELS" 0 4 9, +C4<00000000000000000000000000000101>;
|
||||
P_0000016babae6968 .param/l "MAX_DIST" 0 4 8, +C4<00000000000000000000000101011101>;
|
||||
P_0000016babae69a0 .param/l "MIN_DIST" 0 4 7, +C4<00000000000000000000000000000010>;
|
||||
P_0000016babae69d8 .param/l "PART_SIZE" 0 4 10, +C4<0000000000000000000000000001000101>;
|
||||
v0000016babb0e7a0_0 .net "distance", 8 0, v0000016babb7a440_0; alias, 1 drivers
|
||||
v0000016babb0e8e0_0 .var "leds", 5 0;
|
||||
E_0000016babb1a860 .event anyedge, v0000016babb0e7a0_0;
|
||||
S_0000016babb23200 .scope module, "ultrasonic_inst" "ultrasonic_fpga" 3 13, 5 1 0, S_0000016babae6610;
|
||||
.timescale 0 0;
|
||||
.port_info 0 /INPUT 1 "clk";
|
||||
.port_info 1 /INPUT 1 "rst";
|
||||
.port_info 2 /INPUT 1 "start";
|
||||
.port_info 3 /INPUT 1 "echo";
|
||||
.port_info 4 /OUTPUT 1 "trig_out";
|
||||
.port_info 5 /OUTPUT 9 "distance";
|
||||
P_0000016babb23390 .param/l "CLK_FREQ" 0 5 2, +C4<00000001100110111111110011000000>;
|
||||
P_0000016babb233c8 .param/l "DIST_DIVISOR" 1 5 20, +C4<00000000000000000000011000011110>;
|
||||
P_0000016babb23400 .param/l "DONE" 1 5 16, +C4<00000000000000000000000000000100>;
|
||||
P_0000016babb23438 .param/l "IDLE" 1 5 16, +C4<00000000000000000000000000000000>;
|
||||
P_0000016babb23470 .param/l "MEASURE_ECHO" 1 5 16, +C4<00000000000000000000000000000011>;
|
||||
P_0000016babb234a8 .param/l "TRIG" 1 5 16, +C4<00000000000000000000000000000001>;
|
||||
P_0000016babb234e0 .param/l "TRIG_DURATION_CYCLES" 1 5 19, +C4<00000000000000000000000100001110>;
|
||||
P_0000016babb23518 .param/l "WAIT_ECHO" 1 5 16, +C4<00000000000000000000000000000010>;
|
||||
v0000016babb7a4e0_0 .net "clk", 0 0, v0000016babb7abc0_0; alias, 1 drivers
|
||||
v0000016babb7a440_0 .var "distance", 8 0;
|
||||
v0000016babb7a080_0 .net "echo", 0 0, v0000016babb7ada0_0; alias, 1 drivers
|
||||
v0000016babb7aee0_0 .var "echo_counter", 15 0;
|
||||
v0000016babb7a940_0 .net "rst", 0 0, v0000016babb7a260_0; alias, 1 drivers
|
||||
v0000016babb7a8a0_0 .net "start", 0 0, v0000016babb7a620_0; alias, 1 drivers
|
||||
v0000016babb7a1c0_0 .var "state", 2 0;
|
||||
v0000016babb7a3a0_0 .var "trig_counter", 8 0;
|
||||
v0000016babb7a120_0 .var "trig_out", 0 0;
|
||||
E_0000016babb1a8e0 .event posedge, v0000016babb7a940_0, v0000016babb7a4e0_0;
|
||||
.scope S_0000016babb23200;
|
||||
T_0 ;
|
||||
%wait E_0000016babb1a8e0;
|
||||
%load/vec4 v0000016babb7a940_0;
|
||||
%flag_set/vec4 8;
|
||||
%jmp/0xz T_0.0, 8;
|
||||
%pushi/vec4 0, 0, 3;
|
||||
%assign/vec4 v0000016babb7a1c0_0, 0;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%assign/vec4 v0000016babb7a120_0, 0;
|
||||
%pushi/vec4 0, 0, 9;
|
||||
%assign/vec4 v0000016babb7a3a0_0, 0;
|
||||
%pushi/vec4 0, 0, 16;
|
||||
%assign/vec4 v0000016babb7aee0_0, 0;
|
||||
%pushi/vec4 0, 0, 9;
|
||||
%assign/vec4 v0000016babb7a440_0, 0;
|
||||
%jmp T_0.1;
|
||||
T_0.0 ;
|
||||
%load/vec4 v0000016babb7a1c0_0;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 0, 0, 3;
|
||||
%cmp/u;
|
||||
%jmp/1 T_0.2, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 1, 0, 3;
|
||||
%cmp/u;
|
||||
%jmp/1 T_0.3, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 2, 0, 3;
|
||||
%cmp/u;
|
||||
%jmp/1 T_0.4, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 3, 0, 3;
|
||||
%cmp/u;
|
||||
%jmp/1 T_0.5, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 4, 0, 3;
|
||||
%cmp/u;
|
||||
%jmp/1 T_0.6, 6;
|
||||
%jmp T_0.7;
|
||||
T_0.2 ;
|
||||
%load/vec4 v0000016babb7a8a0_0;
|
||||
%flag_set/vec4 8;
|
||||
%jmp/0xz T_0.8, 8;
|
||||
%pushi/vec4 1, 0, 3;
|
||||
%assign/vec4 v0000016babb7a1c0_0, 0;
|
||||
T_0.8 ;
|
||||
%jmp T_0.7;
|
||||
T_0.3 ;
|
||||
%load/vec4 v0000016babb7a3a0_0;
|
||||
%pad/u 32;
|
||||
%cmpi/u 270, 0, 32;
|
||||
%jmp/0xz T_0.10, 5;
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%assign/vec4 v0000016babb7a120_0, 0;
|
||||
%load/vec4 v0000016babb7a3a0_0;
|
||||
%addi 1, 0, 9;
|
||||
%assign/vec4 v0000016babb7a3a0_0, 0;
|
||||
%jmp T_0.11;
|
||||
T_0.10 ;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%assign/vec4 v0000016babb7a120_0, 0;
|
||||
%pushi/vec4 0, 0, 9;
|
||||
%assign/vec4 v0000016babb7a3a0_0, 0;
|
||||
%pushi/vec4 2, 0, 3;
|
||||
%assign/vec4 v0000016babb7a1c0_0, 0;
|
||||
T_0.11 ;
|
||||
%jmp T_0.7;
|
||||
T_0.4 ;
|
||||
%load/vec4 v0000016babb7a080_0;
|
||||
%flag_set/vec4 8;
|
||||
%jmp/0xz T_0.12, 8;
|
||||
%pushi/vec4 0, 0, 16;
|
||||
%assign/vec4 v0000016babb7aee0_0, 0;
|
||||
%pushi/vec4 3, 0, 3;
|
||||
%assign/vec4 v0000016babb7a1c0_0, 0;
|
||||
T_0.12 ;
|
||||
%jmp T_0.7;
|
||||
T_0.5 ;
|
||||
%load/vec4 v0000016babb7a080_0;
|
||||
%flag_set/vec4 8;
|
||||
%jmp/0xz T_0.14, 8;
|
||||
%load/vec4 v0000016babb7aee0_0;
|
||||
%addi 1, 0, 16;
|
||||
%assign/vec4 v0000016babb7aee0_0, 0;
|
||||
%jmp T_0.15;
|
||||
T_0.14 ;
|
||||
%load/vec4 v0000016babb7aee0_0;
|
||||
%pad/u 32;
|
||||
%muli 1000, 0, 32;
|
||||
%pushi/vec4 1566, 0, 32;
|
||||
%div;
|
||||
%pad/u 9;
|
||||
%assign/vec4 v0000016babb7a440_0, 0;
|
||||
%pushi/vec4 4, 0, 3;
|
||||
%assign/vec4 v0000016babb7a1c0_0, 0;
|
||||
T_0.15 ;
|
||||
%jmp T_0.7;
|
||||
T_0.6 ;
|
||||
%pushi/vec4 0, 0, 3;
|
||||
%assign/vec4 v0000016babb7a1c0_0, 0;
|
||||
%jmp T_0.7;
|
||||
T_0.7 ;
|
||||
%pop/vec4 1;
|
||||
T_0.1 ;
|
||||
%jmp T_0;
|
||||
.thread T_0;
|
||||
.scope S_0000016babae67a0;
|
||||
T_1 ;
|
||||
%wait E_0000016babb1a860;
|
||||
%load/vec4 v0000016babb0e7a0_0;
|
||||
%pad/u 34;
|
||||
%cmpi/u 2, 0, 34;
|
||||
%flag_or 5, 4;
|
||||
%jmp/0xz T_1.0, 5;
|
||||
%pushi/vec4 63, 0, 6;
|
||||
%store/vec4 v0000016babb0e8e0_0, 0, 6;
|
||||
%jmp T_1.1;
|
||||
T_1.0 ;
|
||||
%load/vec4 v0000016babb0e7a0_0;
|
||||
%pad/u 34;
|
||||
%cmpi/u 71, 0, 34;
|
||||
%flag_or 5, 4;
|
||||
%jmp/0xz T_1.2, 5;
|
||||
%pushi/vec4 62, 0, 6;
|
||||
%store/vec4 v0000016babb0e8e0_0, 0, 6;
|
||||
%jmp T_1.3;
|
||||
T_1.2 ;
|
||||
%load/vec4 v0000016babb0e7a0_0;
|
||||
%pad/u 34;
|
||||
%cmpi/u 140, 0, 34;
|
||||
%flag_or 5, 4;
|
||||
%jmp/0xz T_1.4, 5;
|
||||
%pushi/vec4 60, 0, 6;
|
||||
%store/vec4 v0000016babb0e8e0_0, 0, 6;
|
||||
%jmp T_1.5;
|
||||
T_1.4 ;
|
||||
%load/vec4 v0000016babb0e7a0_0;
|
||||
%pad/u 34;
|
||||
%cmpi/u 209, 0, 34;
|
||||
%flag_or 5, 4;
|
||||
%jmp/0xz T_1.6, 5;
|
||||
%pushi/vec4 56, 0, 6;
|
||||
%store/vec4 v0000016babb0e8e0_0, 0, 6;
|
||||
%jmp T_1.7;
|
||||
T_1.6 ;
|
||||
%load/vec4 v0000016babb0e7a0_0;
|
||||
%pad/u 34;
|
||||
%cmpi/u 278, 0, 34;
|
||||
%flag_or 5, 4;
|
||||
%jmp/0xz T_1.8, 5;
|
||||
%pushi/vec4 48, 0, 6;
|
||||
%store/vec4 v0000016babb0e8e0_0, 0, 6;
|
||||
%jmp T_1.9;
|
||||
T_1.8 ;
|
||||
%load/vec4 v0000016babb0e7a0_0;
|
||||
%pad/u 34;
|
||||
%cmpi/u 347, 0, 34;
|
||||
%flag_or 5, 4;
|
||||
%jmp/0xz T_1.10, 5;
|
||||
%pushi/vec4 32, 0, 6;
|
||||
%store/vec4 v0000016babb0e8e0_0, 0, 6;
|
||||
%jmp T_1.11;
|
||||
T_1.10 ;
|
||||
%pushi/vec4 0, 0, 6;
|
||||
%store/vec4 v0000016babb0e8e0_0, 0, 6;
|
||||
T_1.11 ;
|
||||
T_1.9 ;
|
||||
T_1.7 ;
|
||||
T_1.5 ;
|
||||
T_1.3 ;
|
||||
T_1.1 ;
|
||||
%jmp T_1;
|
||||
.thread T_1, $push;
|
||||
.scope S_0000016babb102e0;
|
||||
T_2 ;
|
||||
%delay 18500, 0;
|
||||
%load/vec4 v0000016babb7abc0_0;
|
||||
%inv;
|
||||
%store/vec4 v0000016babb7abc0_0, 0, 1;
|
||||
%jmp T_2;
|
||||
.thread T_2;
|
||||
.scope S_0000016babb102e0;
|
||||
T_3 ;
|
||||
%vpi_call 2 26 "$dumpfile", "top_ultrasonic_led.vcd" {0 0 0};
|
||||
%vpi_call 2 27 "$dumpvars", 32'sb00000000000000000000000000000000, S_0000016babb102e0 {0 0 0};
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v0000016babb7abc0_0, 0, 1;
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%store/vec4 v0000016babb7a260_0, 0, 1;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v0000016babb7a620_0, 0, 1;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v0000016babb7ada0_0, 0, 1;
|
||||
%delay 100000, 0;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v0000016babb7a260_0, 0, 1;
|
||||
%delay 50000, 0;
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%store/vec4 v0000016babb7a620_0, 0, 1;
|
||||
%delay 20000, 0;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v0000016babb7a620_0, 0, 1;
|
||||
T_3.0 ;
|
||||
%load/vec4 v0000016babb7a760_0;
|
||||
%pad/u 32;
|
||||
%pushi/vec4 1, 0, 32;
|
||||
%cmp/e;
|
||||
%flag_get/vec4 4;
|
||||
%cmpi/ne 1, 0, 1;
|
||||
%jmp/0xz T_3.1, 6;
|
||||
%wait E_0000016babb0c320;
|
||||
%jmp T_3.0;
|
||||
T_3.1 ;
|
||||
%vpi_call 2 44 "$display", "TRIG HIGH at %t", $time {0 0 0};
|
||||
T_3.2 ;
|
||||
%load/vec4 v0000016babb7a760_0;
|
||||
%pad/u 32;
|
||||
%pushi/vec4 0, 0, 32;
|
||||
%cmp/e;
|
||||
%flag_get/vec4 4;
|
||||
%cmpi/ne 1, 0, 1;
|
||||
%jmp/0xz T_3.3, 6;
|
||||
%wait E_0000016babb0c320;
|
||||
%jmp T_3.2;
|
||||
T_3.3 ;
|
||||
%vpi_call 2 46 "$display", "TRIG LOW at %t", $time {0 0 0};
|
||||
%pushi/vec4 500, 0, 32;
|
||||
T_3.4 %dup/vec4;
|
||||
%cmpi/s 0, 0, 32;
|
||||
%jmp/1xz T_3.5, 5;
|
||||
%jmp/1 T_3.5, 4;
|
||||
%subi 1, 0, 32;
|
||||
%wait E_0000016babb0c2a0;
|
||||
%jmp T_3.4;
|
||||
T_3.5 ;
|
||||
%pop/vec4 1;
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%store/vec4 v0000016babb7ada0_0, 0, 1;
|
||||
%delay 18000000, 0;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v0000016babb7ada0_0, 0, 1;
|
||||
%pushi/vec4 500, 0, 32;
|
||||
T_3.6 %dup/vec4;
|
||||
%cmpi/s 0, 0, 32;
|
||||
%jmp/1xz T_3.7, 5;
|
||||
%jmp/1 T_3.7, 4;
|
||||
%subi 1, 0, 32;
|
||||
%wait E_0000016babb0c2a0;
|
||||
%jmp T_3.6;
|
||||
T_3.7 ;
|
||||
%pop/vec4 1;
|
||||
%vpi_call 2 56 "$display", "LEDs allumer : %b", v0000016babb7a580_0 {0 0 0};
|
||||
%vpi_call 2 58 "$finish" {0 0 0};
|
||||
%end;
|
||||
.thread T_3;
|
||||
# The file index is used to find the file name in the following table.
|
||||
:file_names 6;
|
||||
"N/A";
|
||||
"<interactive>";
|
||||
"tb_top_ultrasonic_led.v";
|
||||
"top_ultrasonic_led.v";
|
||||
"Distance_display_led/distance_display_led.v";
|
||||
"Ultrasonic/ultrasonic_fpga.v";
|
||||
Reference in New Issue
Block a user