forked from tanchou/Verilog
Update clock frequency in fpga_wifi_led module to 57.857142 MHz
This commit is contained in:
@@ -8,7 +8,7 @@ module fpga_wifi_led (
|
||||
|
||||
|
||||
// === PARAMÈTRES ===
|
||||
localparam CLK_FREQ = 27_000_000;
|
||||
localparam CLK_FREQ = 57_857_142;
|
||||
localparam BAUD_RATE = 500000;
|
||||
localparam FIFO_SIZE = 8;
|
||||
|
||||
|
Reference in New Issue
Block a user