forked from tanchou/Verilog
Fix path in build script and improve comments in testbench for ultrasonic commands
This commit is contained in:
@@ -2,7 +2,7 @@
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setlocal
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setlocal
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rem === Aller à la racine du projet ===
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rem === Aller à la racine du projet ===
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cd /d %~dp0\..
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cd /d %~dp0\..\..
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rem === Config de base ===
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rem === Config de base ===
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set DEVICE=GW2AR-LV18QN88C8/I7
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set DEVICE=GW2AR-LV18QN88C8/I7
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@@ -19,7 +19,7 @@ if not exist runs (
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)
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)
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echo === Étape 1 : Synthèse avec Yosys ===
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echo === Étape 1 : Synthèse avec Yosys ===
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yosys -p "read_verilog -sv src/verilog/%TOP%.v IP/verilog/ultrasonic_fpga.v IP/verilog/uart_tx_fifo.v IP/verilog/uart_rx_fifo.v IP/verilog/rxuartlite.v IP/verilog/fifo.v IP/verilog/uart_tx.v; synth_gowin -top %TOP% -json %JSON_FILE%"
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yosys -p "read_verilog -sv src/verilog/%TOP%.v IP/verilog/ultrasonic_fpga.v IP/verilog/uart_tx_fifo.v IP/verilog/uart_rx_fifo.v IP/verilog/rxuartlite.v IP/verilog/txuartlite.v IP/verilog/fifo.v; synth_gowin -top %TOP% -json %JSON_FILE%"
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if errorlevel 1 goto error
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if errorlevel 1 goto error
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echo === Étape 2 : Placement & Routage avec nextpnr-himbaechel ===
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echo === Étape 2 : Placement & Routage avec nextpnr-himbaechel ===
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@@ -2,8 +2,9 @@
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module tb_ultrason_commands;
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module tb_ultrason_commands;
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// === Signaux ===
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reg clk = 0;
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reg clk = 0;
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always #18.5 clk = ~clk; // Génère une clock 27 MHz
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always #18.5 clk = ~clk; // Horloge 27 MHz (période ~37ns)
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wire tx, rx;
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wire tx, rx;
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wire [5:0] leds;
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wire [5:0] leds;
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@@ -14,14 +15,14 @@ module tb_ultrason_commands;
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reg [7:0] data_in = 8'h00;
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reg [7:0] data_in = 8'h00;
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wire [7:0] data_out;
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wire [7:0] data_out;
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wire data_available;
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wire data_available;
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reg rd_en = 0;
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reg rd_en = 0; // Lecture FIFO
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// === Paramètres ===
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// === PARAMÈTRES ===
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localparam CLK_FREQ = 27_000_000;
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localparam CLK_FREQ = 27_000_000;
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localparam BAUD_RATE = 115_200;
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localparam BAUD_RATE = 115_200;
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localparam CLK_PERIOD = 37; // ns
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// === MODULE TESTÉ ===
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// === Module testé ===
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top_uart_ultrason_command dut (
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top_uart_ultrason_command dut (
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.clk(clk),
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.clk(clk),
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.rx(rx),
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.rx(rx),
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@@ -30,10 +31,12 @@ module tb_ultrason_commands;
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.leds(leds)
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.leds(leds)
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);
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);
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// === SIMULATION CAPTEUR ULTRASON ===
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// === Simulation capteur ultrason ===
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// Supposons que fake_sensor fournit un signal 'distance' pour vérification
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wire [15:0] sensor_distance;
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ultrasonic_sensor fake_sensor (
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ultrasonic_sensor fake_sensor (
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.clk(clk),
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.clk(clk),
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.signal(ultrason_sig)
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.signal(ultrason_sig),
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);
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);
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// === RX FIFO pour observer la sortie UART ===
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// === RX FIFO pour observer la sortie UART ===
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@@ -42,13 +45,13 @@ module tb_ultrason_commands;
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.BAUD_RATE(BAUD_RATE)
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.BAUD_RATE(BAUD_RATE)
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) uart_rx_fifo_inst (
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) uart_rx_fifo_inst (
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.clk(clk),
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.clk(clk),
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.rx_pin(tx),
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.rx_pin(tx),
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.rd_en(rd_en),
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.rd_en(rd_en),
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.rd_data(data_out),
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.rd_data(data_out),
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.data_available(data_available)
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.data_available(data_available)
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);
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);
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// === TX pour injecter une commande UART ===
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// === TX pour injecter des commandes UART ===
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uart_tx #(
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uart_tx #(
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.CLK_FREQ(CLK_FREQ),
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.CLK_FREQ(CLK_FREQ),
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.BAUD_RATE(BAUD_RATE)
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.BAUD_RATE(BAUD_RATE)
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@@ -61,43 +64,124 @@ module tb_ultrason_commands;
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.rst_p(1'b0)
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.rst_p(1'b0)
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);
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);
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// === TEST SEQUENCE ===
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// === Tâches pour simplifier les tests ===
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task send_command(input [7:0] cmd);
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begin
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wait(tx_ready);
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$display("[%0t ns] Envoi commande: %0d", $time, cmd);
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data_in = cmd;
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tx_enable = 1;
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#(CLK_PERIOD * 2);
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tx_enable = 0;
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end
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endtask
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task read_distance(output [15:0] distance);
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reg [7:0] lsb, msb;
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begin
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// Attendre premier octet (LSB)
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wait(data_available);
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#(CLK_PERIOD);
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rd_en = 1;
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#(CLK_PERIOD);
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lsb = data_out;
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rd_en = 0;
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$display("[%0t ns] Reçu octet LSB: %0d", $time, lsb);
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// Attendre second octet (MSB)
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wait(data_available);
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#(CLK_PERIOD);
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rd_en = 1;
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#(CLK_PERIOD);
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msb = data_out;
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rd_en = 0;
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$display("[%0t ns] Reçu octet MSB: %0d", $time, msb);
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distance = {msb, lsb};
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end
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endtask
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task check_leds(input [7:0] cmd);
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begin
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#(CLK_PERIOD * 10); // Attendre mise à jour des LEDs
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if (leds !== cmd[7:2]) begin
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$display("[%0t ns] ERREUR: LEDs=%b, attendu=%b", $time, leds, cmd[7:2]);
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end else begin
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$display("[%0t ns] LEDs correctes: %b", $time, leds);
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end
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end
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endtask
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// === Séquence de test ===
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initial begin
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initial begin
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$dumpfile("runs/ultrason_commands.vcd");
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$dumpfile("runs/ultrason_commands.vcd");
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$dumpvars(0, tb_ultrason_commands);
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$dumpvars(0, tb_ultrason_commands);
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$display("==== Start UART Ultrasonic Test ====");
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$display("==== Début Test UART Ultrason ====");
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// Attendre que le TX soit prêt
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// Initialisation
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wait(tx_ready);
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#(CLK_PERIOD * 10);
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$display(">> TX ready");
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#100;
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// Envoyer la commande "ONE" (1)
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// Test 1: Commande ONE (8'd1)
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data_in <= 8'd1;
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$display("=== Test 1: Commande ONE ===");
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tx_enable <= 1;
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send_command(8'd1); // Commande: ONE
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#20;
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check_leds(8'd1);
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tx_enable <= 0;
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begin
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$display(">> Command sent: %d", data_in);
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reg [15:0] received_distance;
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read_distance(received_distance);
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// Lire 2 octets de réponse : LSB et MSB de la distance
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if (received_distance == sensor_distance) begin
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repeat (2) begin
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$display("[%0t ns] Distance correcte: %0d", $time, received_distance);
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wait(data_available);
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end else begin
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$display("[%0t ns] ERREUR: Distance reçue=%0d, attendu=%0d", $time, received_distance, sensor_distance);
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//D
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end
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#10; // Laisse le temps de valider le drapeau
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rd_en <= 1; // Lecture de la FIFO
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#30;
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rd_en <= 0;
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$display(">> Distance octet: %d", data_out);
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#200;
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end
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end
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$display("==== End UART Ultrasonic Test ====");
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// Test 2: Commande CONTINUOUS (8'd2)
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#10000;
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$display("=== Test 2: Commande CONTINUOUS ===");
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send_command(8'd2); // Commande: CONTINUOUS
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check_leds(8'd2);
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repeat (3) begin // Lire 3 mesures consécutives
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reg [15:0] received_distance;
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read_distance(received_distance);
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if (received_distance == sensor_distance) begin
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$display("[%0t ns] Distance continue correcte: %0d", $time, received_distance);
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end else begin
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$display("[%0t ns] ERREUR: Distance reçue=%0d, attendu=%0d", $time, received_distance, sensor_distance);
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end
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#(CLK_PERIOD * 13500000); // Attendre ~0.5s (délai dans WAIT)
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end
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// Test 3: Commande STOP (8'd3)
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$display("=== Test 3: Commande STOP ===");
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send_command(8'd3); // Commande: STOP
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check_leds(8'd3);
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#(CLK_PERIOD * 13500000); // Attendre pour vérifier l'arrêt
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if (data_available) begin
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$display("[%0t ns] Vérification STOP: aucune donnée ne doit être reçue", $time);
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#(CLK_PERIOD * 1000);
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if (data_available) begin
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$display("[%0t ns] ERREUR: Données reçues après STOP", $time);
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end else begin
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$display("[%0t ns] STOP correct: aucune donnée reçue", $time);
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end
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end
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// Test 4: Commande invalide (8'd4)
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$display("=== Test 4: Commande invalide ===");
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send_command(8'd4); // Commande invalide
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#(CLK_PERIOD * 1000);
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if (data_available) begin
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$display("[%0t ns] ERREUR: Données reçues pour commande invalide", $time);
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end else begin
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$display("[%0t ns] Commande invalide ignorée correctement", $time);
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end
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// Fin de la simulation
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$display("==== Fin Test UART Ultrason ====");
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#(CLK_PERIOD * 1000);
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$stop;
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$stop;
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end
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end
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endmodule
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endmodule
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