diff --git a/Semaine_7/ESP32/leds_commands/src/esp32/wifi_esp32/wifi_esp32.ino b/Semaine_7/ESP32/leds_commands/src/esp32/wifi_esp32/wifi_esp32.ino
index 40404f8..a3d1dce 100644
--- a/Semaine_7/ESP32/leds_commands/src/esp32/wifi_esp32/wifi_esp32.ino
+++ b/Semaine_7/ESP32/leds_commands/src/esp32/wifi_esp32/wifi_esp32.ino
@@ -20,7 +20,7 @@ bool touchDetected = false;
 // UART pins for FPGA communication
 const int UART_RX_PIN = 16; // GPIO16 - RX from FPGA
 const int UART_TX_PIN = 17; // GPIO17 - TX to FPGA
-const int UART_BAUD = 1000000;
+const int UART_BAUD = 500000;
  
 void setup() {
   // Initialize Serial for USB debugging (115200 baud)
diff --git a/Semaine_7/ESP32/leds_commands/src/verilog/fpga_wifi_led.v b/Semaine_7/ESP32/leds_commands/src/verilog/fpga_wifi_led.v
index 2f1d565..1e3a444 100644
--- a/Semaine_7/ESP32/leds_commands/src/verilog/fpga_wifi_led.v
+++ b/Semaine_7/ESP32/leds_commands/src/verilog/fpga_wifi_led.v
@@ -9,7 +9,7 @@ module fpga_wifi_led (
 
     // === PARAMÈTRES ===
     localparam CLK_FREQ = 27_000_000;
-    localparam BAUD_RATE = 1000000;
+    localparam BAUD_RATE = 500000;
     localparam FIFO_SIZE = 8;
 
     // === SIGNAUX UART RX ===
@@ -34,11 +34,11 @@ module fpga_wifi_led (
     PLLVR #( // For GW1NSR-4C C6/I5 (Tang Nano 4K proto dev board)
     .FCLKIN("27"),
     .IDIV_SEL(6), // -> PFD = 3.857142857142857 MHz (range: 3-400 MHz)
-    .FBDIV_SEL(12), // -> CLKOUT = 50.142857142857146 MHz (range: 4.6875-600 MHz)
-    .ODIV_SEL(16) // -> VCO = 802.2857142857143 MHz (range: 600-1200 MHz)
+    .FBDIV_SEL(25), // -> CLKOUT = 100.28571428571429 MHz (range: 4.6875-600 MHz)
+    .ODIV_SEL(8) // -> VCO = 802.2857142857143 MHz (range: 600-1200 MHz)
     ) pll (.CLKOUTP(), .CLKOUTD(), .CLKOUTD3(), .RESET(1'b0), .RESET_P(1'b0), .CLKFB(1'b0), .FBDSEL(6'b0), .IDSEL(6'b0), .ODSEL(6'b0), .PSDA(4'b0), .DUTYDA(4'b0), .FDLY(4'b0), .VREN(1'b1),
     .CLKIN(i_clk), // 27 MHz
-    .CLKOUT(out_clk), // 50.142857142857146 MHz
+    .CLKOUT(out_clk), // 100.28571428571429 MHz
     .LOCK(clk_lock)
     );