From 7bd92ebe98ff344ee41eec5cdd42b7b789f6ea6d Mon Sep 17 00:00:00 2001
From: Gamenight77 <game.night.77176@gmail.com>
Date: Sat, 22 Mar 2025 09:50:52 +0100
Subject: [PATCH] counter

---
 Introduction/counter/counter.v    | 16 ++++++++++++++++
 Introduction/counter/tb_counter.v | 30 ++++++++++++++++++++++++++++++
 2 files changed, 46 insertions(+)
 create mode 100644 Introduction/counter/counter.v
 create mode 100644 Introduction/counter/tb_counter.v

diff --git a/Introduction/counter/counter.v b/Introduction/counter/counter.v
new file mode 100644
index 0000000..901e3a0
--- /dev/null
+++ b/Introduction/counter/counter.v
@@ -0,0 +1,16 @@
+module counter (
+    input wire clk,
+    input wire rst,
+    output reg [3:0] count
+    );
+
+    always @(posedge clk)
+    begin
+        if(rst)
+            count <= 4'b0000;
+        else
+            count <= count + 1;
+    end
+);
+    
+endmodule
\ No newline at end of file
diff --git a/Introduction/counter/tb_counter.v b/Introduction/counter/tb_counter.v
new file mode 100644
index 0000000..3791af3
--- /dev/null
+++ b/Introduction/counter/tb_counter.v
@@ -0,0 +1,30 @@
+module tb_counter;
+    reg clk;
+    reg rst;
+    wire [3:0] count;
+    
+    counter counter_inst(
+        .clk(clk),
+        .rst(rst),
+        .count(count)
+    );
+
+    always #5 clk = ~clk;
+    
+    initial begin
+        
+        clk <= 0;
+        rst <= 0;
+
+
+        #20 rst = 1;
+        #80 rst = 0;
+        #50 rst = 1;
+
+        #20 $finish;
+    end
+    
+    always begin
+        #5 clk = ~clk;
+    end
+endmodule
\ No newline at end of file