leds

2025-05-26 11:19:03 +02:00
parent cac1a38dad
commit 92144d315e
1 changed files with 1 additions and 1 deletions
--- a/Semaine_7/DHT11_UART/src/verilog/dht11_uart_top.v
+++ b/Semaine_7/DHT11_UART/src/verilog/dht11_uart_top.v
@@ -60,7 +60,7 @@ always_ff @(posedge clk) begin
        strobe2s <= 0;
    end

-    leds[5] <= o_dht11_error;
+    leds[5] <= !o_dht11_error;
 end

 always_ff @(posedge clk) begin