forked from tanchou/Verilog
Implement code changes to enhance functionality and improve performance
This commit is contained in:
Gamenight77
420
Semaine_2/Capteur_recule_bidirectionel_V2/sim.out
Normal file
420
Semaine_2/Capteur_recule_bidirectionel_V2/sim.out
Normal file
@@ -0,0 +1,420 @@
|
||||
#!
|
||||
:ivl_version "13.0 (devel)" "(s20250103-31-g7e238e7ca-dirty)";
|
||||
:ivl_delay_selection "TYPICAL";
|
||||
:vpi_time_precision - 12;
|
||||
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\system.vpi";
|
||||
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_sys.vpi";
|
||||
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_textio.vpi";
|
||||
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\v2005_math.vpi";
|
||||
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\va_math.vpi";
|
||||
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\v2009.vpi";
|
||||
S_00000247b1636280 .scope package, "$unit" "$unit" 2 1;
|
||||
.timescale 0 0;
|
||||
S_00000247b1637ec0 .scope module, "tb_top_ultrasonic_led" "tb_top_ultrasonic_led" 3 3;
|
||||
.timescale -9 -12;
|
||||
o00000247b165a468 .functor BUFZ 1, c4<z>; HiZ drive
|
||||
; Elide local net with no drivers, v00000247b16ac1d0_0 name=_ivl_0
|
||||
v00000247b16ac8b0_0 .var "clk", 0 0;
|
||||
v00000247b16ad5d0_0 .net "leds", 5 0, v00000247b162bdc0_0; 1 drivers
|
||||
RS_00000247b165a108 .resolv tri, L_00000247b16acdb0, L_00000247b16ac590;
|
||||
v00000247b16ac310_0 .net8 "sig", 0 0, RS_00000247b165a108; 2 drivers
|
||||
v00000247b16ad2b0_0 .var "sig_drive_enable", 0 0;
|
||||
v00000247b16ac3b0_0 .var "sig_driver", 0 0;
|
||||
v00000247b16ada30_0 .var "start", 0 0;
|
||||
E_00000247b1631690 .event anyedge, v00000247b162c5e0_0;
|
||||
L_00000247b16acdb0 .functor MUXZ 1, o00000247b165a468, v00000247b16ac3b0_0, v00000247b16ad2b0_0, C4<>;
|
||||
S_00000247b163de10 .scope module, "uut" "top_ultrasonic_led" 3 16, 4 1 0, S_00000247b1637ec0;
|
||||
.timescale -9 -12;
|
||||
.port_info 0 /INPUT 1 "clk";
|
||||
.port_info 1 /INPUT 1 "start";
|
||||
.port_info 2 /INOUT 1 "sig";
|
||||
.port_info 3 /OUTPUT 6 "leds";
|
||||
v00000247b162c0e0_0 .net "clk", 0 0, v00000247b16ac8b0_0; 1 drivers
|
||||
v00000247b162c4a0_0 .net "distance", 15 0, v00000247b162c360_0; 1 drivers
|
||||
v00000247b162c860_0 .net "leds", 5 0, v00000247b162bdc0_0; alias, 1 drivers
|
||||
v00000247b162c900_0 .net8 "sig", 0 0, RS_00000247b165a108; alias, 2 drivers
|
||||
v00000247b16ad3f0_0 .net "start", 0 0, v00000247b16ada30_0; 1 drivers
|
||||
L_00000247b16add50 .part v00000247b162c360_0, 0, 9;
|
||||
S_00000247b163dfa0 .scope module, "led_display_inst" "distance_display_led" 4 19, 5 1 0, S_00000247b163de10;
|
||||
.timescale -9 -12;
|
||||
.port_info 0 /INPUT 9 "distance";
|
||||
.port_info 1 /OUTPUT 6 "leds";
|
||||
P_00000247b1636410 .param/l "LEVELS" 0 5 9, +C4<00000000000000000000000000000101>;
|
||||
P_00000247b1636448 .param/l "MAX_DIST" 0 5 8, +C4<00000000000000000000000101011101>;
|
||||
P_00000247b1636480 .param/l "MIN_DIST" 0 5 7, +C4<00000000000000000000000000000010>;
|
||||
P_00000247b16364b8 .param/l "PART_SIZE" 0 5 10, +C4<0000000000000000000000000001000101>;
|
||||
v00000247b162c2c0_0 .net "distance", 8 0, L_00000247b16add50; 1 drivers
|
||||
v00000247b162bdc0_0 .var "leds", 5 0;
|
||||
E_00000247b1631f10 .event anyedge, v00000247b162c2c0_0;
|
||||
S_00000247b163e130 .scope module, "ultrasonic_inst" "ultrasonic_fpga" 4 11, 6 1 0, S_00000247b163de10;
|
||||
.timescale -9 -12;
|
||||
.port_info 0 /INPUT 1 "clk";
|
||||
.port_info 1 /INPUT 1 "start";
|
||||
.port_info 2 /INOUT 1 "sig";
|
||||
.port_info 3 /OUTPUT 16 "distance";
|
||||
.port_info 4 /OUTPUT 3 "state";
|
||||
P_00000247b164fb50 .param/l "CLK_FREQ" 0 6 2, +C4<00000001100110111111110011000000>;
|
||||
P_00000247b164fb88 .param/l "DIST_DIVISOR" 1 6 31, +C4<00000000000000000000011000011110>;
|
||||
P_00000247b164fbc0 .param/l "DONE" 1 6 27, C4<101>;
|
||||
P_00000247b164fbf8 .param/l "IDLE" 1 6 22, C4<000>;
|
||||
P_00000247b164fc30 .param/l "MAX_CM" 1 6 32, +C4<00000000000000000000000101011110>;
|
||||
P_00000247b164fc68 .param/l "MEASURE_ECHO" 1 6 26, C4<100>;
|
||||
P_00000247b164fca0 .param/l "TIMEOUT_CYCLES" 1 6 33, +C4<11111111111111111111100110001001>;
|
||||
P_00000247b164fcd8 .param/l "TRIG_HIGH" 1 6 23, C4<001>;
|
||||
P_00000247b164fd10 .param/l "TRIG_LOW" 1 6 24, C4<010>;
|
||||
P_00000247b164fd48 .param/l "TRIG_PULSE_CYCLES" 1 6 30, +C4<00000000000000000000000100001110>;
|
||||
P_00000247b164fd80 .param/l "WAIT_ECHO" 1 6 25, C4<011>;
|
||||
P_00000247b164fdb8 .param/l "WAIT_NEXT" 1 6 28, C4<110>;
|
||||
P_00000247b164fdf0 .param/l "WAIT_NEXT_CYCLES" 1 6 35, +C4<0000000000000000000000000000000000000000001010010011001011100000>;
|
||||
o00000247b1659fe8 .functor BUFZ 1, c4<z>; HiZ drive
|
||||
; Elide local net with no drivers, v00000247b162c540_0 name=_ivl_0
|
||||
v00000247b162bd20_0 .net "clk", 0 0, v00000247b16ac8b0_0; alias, 1 drivers
|
||||
v00000247b162c360_0 .var "distance", 15 0;
|
||||
v00000247b162c9a0_0 .var "distance_counter", 15 0;
|
||||
v00000247b162bf00_0 .var "echo_counter", 31 0;
|
||||
v00000247b162c680_0 .var "echo_div_counter", 31 0;
|
||||
v00000247b162c5e0_0 .net8 "sig", 0 0, RS_00000247b165a108; alias, 2 drivers
|
||||
v00000247b162c720_0 .var "sig_dir", 0 0;
|
||||
v00000247b162be60_0 .var "sig_int", 0 0;
|
||||
v00000247b162ca40_0 .var "sig_ok", 0 0;
|
||||
v00000247b162bbe0_0 .var "sig_out", 0 0;
|
||||
v00000247b162bfa0_0 .net "start", 0 0, v00000247b16ada30_0; alias, 1 drivers
|
||||
v00000247b162c400_0 .var "state", 2 0;
|
||||
v00000247b162c040_0 .var "trig_counter", 15 0;
|
||||
v00000247b162c7c0_0 .var "wait_counter", 31 0;
|
||||
E_00000247b1631f90 .event posedge, v00000247b162bd20_0;
|
||||
L_00000247b16ac590 .functor MUXZ 1, o00000247b1659fe8, v00000247b162bbe0_0, v00000247b162c720_0, C4<>;
|
||||
.scope S_00000247b163e130;
|
||||
T_0 ;
|
||||
%wait E_00000247b1631f90;
|
||||
%load/vec4 v00000247b162c5e0_0;
|
||||
%assign/vec4 v00000247b162be60_0, 0;
|
||||
%load/vec4 v00000247b162be60_0;
|
||||
%assign/vec4 v00000247b162ca40_0, 0;
|
||||
%jmp T_0;
|
||||
.thread T_0;
|
||||
.scope S_00000247b163e130;
|
||||
T_1 ;
|
||||
%wait E_00000247b1631f90;
|
||||
%load/vec4 v00000247b162c400_0;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 0, 0, 3;
|
||||
%cmp/u;
|
||||
%jmp/1 T_1.0, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 1, 0, 3;
|
||||
%cmp/u;
|
||||
%jmp/1 T_1.1, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 2, 0, 3;
|
||||
%cmp/u;
|
||||
%jmp/1 T_1.2, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 3, 0, 3;
|
||||
%cmp/u;
|
||||
%jmp/1 T_1.3, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 4, 0, 3;
|
||||
%cmp/u;
|
||||
%jmp/1 T_1.4, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 5, 0, 3;
|
||||
%cmp/u;
|
||||
%jmp/1 T_1.5, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 6, 0, 3;
|
||||
%cmp/u;
|
||||
%jmp/1 T_1.6, 6;
|
||||
%pushi/vec4 0, 0, 3;
|
||||
%assign/vec4 v00000247b162c400_0, 0;
|
||||
%jmp T_1.8;
|
||||
T_1.0 ;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%assign/vec4 v00000247b162bbe0_0, 0;
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%assign/vec4 v00000247b162c720_0, 0;
|
||||
%pushi/vec4 0, 0, 16;
|
||||
%assign/vec4 v00000247b162c360_0, 0;
|
||||
%load/vec4 v00000247b162bfa0_0;
|
||||
%flag_set/vec4 8;
|
||||
%jmp/0xz T_1.9, 8;
|
||||
%pushi/vec4 1, 0, 3;
|
||||
%assign/vec4 v00000247b162c400_0, 0;
|
||||
%pushi/vec4 0, 0, 16;
|
||||
%assign/vec4 v00000247b162c040_0, 0;
|
||||
T_1.9 ;
|
||||
%jmp T_1.8;
|
||||
T_1.1 ;
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%assign/vec4 v00000247b162bbe0_0, 0;
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%assign/vec4 v00000247b162c720_0, 0;
|
||||
%load/vec4 v00000247b162c040_0;
|
||||
%pad/u 32;
|
||||
%cmpi/u 270, 0, 32;
|
||||
%jmp/0xz T_1.11, 5;
|
||||
%load/vec4 v00000247b162c040_0;
|
||||
%addi 1, 0, 16;
|
||||
%assign/vec4 v00000247b162c040_0, 0;
|
||||
%jmp T_1.12;
|
||||
T_1.11 ;
|
||||
%pushi/vec4 0, 0, 16;
|
||||
%assign/vec4 v00000247b162c040_0, 0;
|
||||
%pushi/vec4 2, 0, 3;
|
||||
%assign/vec4 v00000247b162c400_0, 0;
|
||||
T_1.12 ;
|
||||
%jmp T_1.8;
|
||||
T_1.2 ;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%assign/vec4 v00000247b162bbe0_0, 0;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%assign/vec4 v00000247b162c720_0, 0;
|
||||
%pushi/vec4 3, 0, 3;
|
||||
%assign/vec4 v00000247b162c400_0, 0;
|
||||
%jmp T_1.8;
|
||||
T_1.3 ;
|
||||
%load/vec4 v00000247b162ca40_0;
|
||||
%flag_set/vec4 8;
|
||||
%jmp/0xz T_1.13, 8;
|
||||
%pushi/vec4 0, 0, 32;
|
||||
%assign/vec4 v00000247b162bf00_0, 0;
|
||||
%pushi/vec4 4, 0, 3;
|
||||
%assign/vec4 v00000247b162c400_0, 0;
|
||||
%jmp T_1.14;
|
||||
T_1.13 ;
|
||||
%load/vec4 v00000247b162bf00_0;
|
||||
%cmpi/u 4294965641, 0, 32;
|
||||
%flag_inv 5; GE is !LT
|
||||
%jmp/0xz T_1.15, 5;
|
||||
%pushi/vec4 0, 0, 16;
|
||||
%assign/vec4 v00000247b162c360_0, 0;
|
||||
%pushi/vec4 5, 0, 3;
|
||||
%assign/vec4 v00000247b162c400_0, 0;
|
||||
%jmp T_1.16;
|
||||
T_1.15 ;
|
||||
%load/vec4 v00000247b162bf00_0;
|
||||
%addi 1, 0, 32;
|
||||
%assign/vec4 v00000247b162bf00_0, 0;
|
||||
T_1.16 ;
|
||||
T_1.14 ;
|
||||
%jmp T_1.8;
|
||||
T_1.4 ;
|
||||
%load/vec4 v00000247b162ca40_0;
|
||||
%flag_set/vec4 8;
|
||||
%jmp/0xz T_1.17, 8;
|
||||
%load/vec4 v00000247b162bf00_0;
|
||||
%cmpi/u 4294965641, 0, 32;
|
||||
%jmp/0xz T_1.19, 5;
|
||||
%load/vec4 v00000247b162bf00_0;
|
||||
%addi 1, 0, 32;
|
||||
%assign/vec4 v00000247b162bf00_0, 0;
|
||||
%jmp T_1.20;
|
||||
T_1.19 ;
|
||||
%pushi/vec4 0, 0, 16;
|
||||
%assign/vec4 v00000247b162c360_0, 0;
|
||||
%pushi/vec4 5, 0, 3;
|
||||
%assign/vec4 v00000247b162c400_0, 0;
|
||||
T_1.20 ;
|
||||
%jmp T_1.18;
|
||||
T_1.17 ;
|
||||
%load/vec4 v00000247b162bf00_0;
|
||||
%addi 1, 0, 32;
|
||||
%assign/vec4 v00000247b162bf00_0, 0;
|
||||
%load/vec4 v00000247b162c680_0;
|
||||
%cmpi/u 1565, 0, 32;
|
||||
%flag_inv 5; GE is !LT
|
||||
%jmp/0xz T_1.21, 5;
|
||||
%pushi/vec4 0, 0, 32;
|
||||
%assign/vec4 v00000247b162c680_0, 0;
|
||||
%load/vec4 v00000247b162c9a0_0;
|
||||
%addi 1, 0, 16;
|
||||
%assign/vec4 v00000247b162c9a0_0, 0;
|
||||
%jmp T_1.22;
|
||||
T_1.21 ;
|
||||
%load/vec4 v00000247b162c680_0;
|
||||
%addi 1, 0, 32;
|
||||
%assign/vec4 v00000247b162c680_0, 0;
|
||||
T_1.22 ;
|
||||
%load/vec4 v00000247b162c9a0_0;
|
||||
%assign/vec4 v00000247b162c360_0, 0;
|
||||
%pushi/vec4 5, 0, 3;
|
||||
%assign/vec4 v00000247b162c400_0, 0;
|
||||
T_1.18 ;
|
||||
%jmp T_1.8;
|
||||
T_1.5 ;
|
||||
%load/vec4 v00000247b162bfa0_0;
|
||||
%flag_set/vec4 8;
|
||||
%jmp/0xz T_1.23, 8;
|
||||
%pushi/vec4 0, 0, 32;
|
||||
%assign/vec4 v00000247b162c7c0_0, 0;
|
||||
%pushi/vec4 6, 0, 3;
|
||||
%assign/vec4 v00000247b162c400_0, 0;
|
||||
%jmp T_1.24;
|
||||
T_1.23 ;
|
||||
%pushi/vec4 0, 0, 3;
|
||||
%assign/vec4 v00000247b162c400_0, 0;
|
||||
T_1.24 ;
|
||||
%jmp T_1.8;
|
||||
T_1.6 ;
|
||||
%load/vec4 v00000247b162c7c0_0;
|
||||
%addi 1, 0, 32;
|
||||
%assign/vec4 v00000247b162c7c0_0, 0;
|
||||
%load/vec4 v00000247b162c7c0_0;
|
||||
%pad/u 64;
|
||||
%cmpi/u 2700000, 0, 64;
|
||||
%flag_inv 5; GE is !LT
|
||||
%jmp/0xz T_1.25, 5;
|
||||
%pushi/vec4 1, 0, 3;
|
||||
%assign/vec4 v00000247b162c400_0, 0;
|
||||
T_1.25 ;
|
||||
%jmp T_1.8;
|
||||
T_1.8 ;
|
||||
%pop/vec4 1;
|
||||
%jmp T_1;
|
||||
.thread T_1;
|
||||
.scope S_00000247b163dfa0;
|
||||
T_2 ;
|
||||
%wait E_00000247b1631f10;
|
||||
%load/vec4 v00000247b162c2c0_0;
|
||||
%pad/u 34;
|
||||
%cmpi/u 2, 0, 34;
|
||||
%flag_or 5, 4;
|
||||
%jmp/0xz T_2.0, 5;
|
||||
%pushi/vec4 63, 0, 6;
|
||||
%store/vec4 v00000247b162bdc0_0, 0, 6;
|
||||
%jmp T_2.1;
|
||||
T_2.0 ;
|
||||
%load/vec4 v00000247b162c2c0_0;
|
||||
%pad/u 34;
|
||||
%cmpi/u 71, 0, 34;
|
||||
%flag_or 5, 4;
|
||||
%jmp/0xz T_2.2, 5;
|
||||
%pushi/vec4 62, 0, 6;
|
||||
%store/vec4 v00000247b162bdc0_0, 0, 6;
|
||||
%jmp T_2.3;
|
||||
T_2.2 ;
|
||||
%load/vec4 v00000247b162c2c0_0;
|
||||
%pad/u 34;
|
||||
%cmpi/u 140, 0, 34;
|
||||
%flag_or 5, 4;
|
||||
%jmp/0xz T_2.4, 5;
|
||||
%pushi/vec4 60, 0, 6;
|
||||
%store/vec4 v00000247b162bdc0_0, 0, 6;
|
||||
%jmp T_2.5;
|
||||
T_2.4 ;
|
||||
%load/vec4 v00000247b162c2c0_0;
|
||||
%pad/u 34;
|
||||
%cmpi/u 209, 0, 34;
|
||||
%flag_or 5, 4;
|
||||
%jmp/0xz T_2.6, 5;
|
||||
%pushi/vec4 56, 0, 6;
|
||||
%store/vec4 v00000247b162bdc0_0, 0, 6;
|
||||
%jmp T_2.7;
|
||||
T_2.6 ;
|
||||
%load/vec4 v00000247b162c2c0_0;
|
||||
%pad/u 34;
|
||||
%cmpi/u 278, 0, 34;
|
||||
%flag_or 5, 4;
|
||||
%jmp/0xz T_2.8, 5;
|
||||
%pushi/vec4 48, 0, 6;
|
||||
%store/vec4 v00000247b162bdc0_0, 0, 6;
|
||||
%jmp T_2.9;
|
||||
T_2.8 ;
|
||||
%load/vec4 v00000247b162c2c0_0;
|
||||
%pad/u 34;
|
||||
%cmpi/u 347, 0, 34;
|
||||
%flag_or 5, 4;
|
||||
%jmp/0xz T_2.10, 5;
|
||||
%pushi/vec4 32, 0, 6;
|
||||
%store/vec4 v00000247b162bdc0_0, 0, 6;
|
||||
%jmp T_2.11;
|
||||
T_2.10 ;
|
||||
%pushi/vec4 0, 0, 6;
|
||||
%store/vec4 v00000247b162bdc0_0, 0, 6;
|
||||
T_2.11 ;
|
||||
T_2.9 ;
|
||||
T_2.7 ;
|
||||
T_2.5 ;
|
||||
T_2.3 ;
|
||||
T_2.1 ;
|
||||
%jmp T_2;
|
||||
.thread T_2, $push;
|
||||
.scope S_00000247b1637ec0;
|
||||
T_3 ;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v00000247b16ac8b0_0, 0, 1;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v00000247b16ada30_0, 0, 1;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v00000247b16ac3b0_0, 0, 1;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v00000247b16ad2b0_0, 0, 1;
|
||||
%end;
|
||||
.thread T_3, $init;
|
||||
.scope S_00000247b1637ec0;
|
||||
T_4 ;
|
||||
%delay 18500, 0;
|
||||
%load/vec4 v00000247b16ac8b0_0;
|
||||
%inv;
|
||||
%store/vec4 v00000247b16ac8b0_0, 0, 1;
|
||||
%jmp T_4;
|
||||
.thread T_4;
|
||||
.scope S_00000247b1637ec0;
|
||||
T_5 ;
|
||||
%vpi_call/w 3 28 "$dumpfile", "top_ultrasonic_led.vcd" {0 0 0};
|
||||
%vpi_call/w 3 29 "$dumpvars", 32'sb00000000000000000000000000000000, S_00000247b1637ec0 {0 0 0};
|
||||
%delay 100000, 0;
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%store/vec4 v00000247b16ada30_0, 0, 1;
|
||||
%delay 50000, 0;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v00000247b16ada30_0, 0, 1;
|
||||
T_5.0 ;
|
||||
%load/vec4 v00000247b16ac310_0;
|
||||
%pad/u 32;
|
||||
%pushi/vec4 1, 0, 32;
|
||||
%cmp/e;
|
||||
%flag_get/vec4 6;
|
||||
%cmpi/ne 1, 0, 1;
|
||||
%jmp/0xz T_5.1, 6;
|
||||
%wait E_00000247b1631690;
|
||||
%jmp T_5.0;
|
||||
T_5.1 ;
|
||||
%vpi_call/w 3 38 "$display", "TRIG HIGH at %t", $time {0 0 0};
|
||||
T_5.2 ;
|
||||
%load/vec4 v00000247b16ac310_0;
|
||||
%pad/u 32;
|
||||
%pushi/vec4 0, 0, 32;
|
||||
%cmp/e;
|
||||
%flag_get/vec4 6;
|
||||
%cmpi/ne 1, 0, 1;
|
||||
%jmp/0xz T_5.3, 6;
|
||||
%wait E_00000247b1631690;
|
||||
%jmp T_5.2;
|
||||
T_5.3 ;
|
||||
%vpi_call/w 3 41 "$display", "TRIG LOW at %t", $time {0 0 0};
|
||||
%delay 3000000, 0;
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%store/vec4 v00000247b16ac3b0_0, 0, 1;
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%store/vec4 v00000247b16ad2b0_0, 0, 1;
|
||||
%delay 11600000, 0;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v00000247b16ac3b0_0, 0, 1;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%store/vec4 v00000247b16ad2b0_0, 0, 1;
|
||||
%delay 200000000, 0;
|
||||
%vpi_call/w 3 56 "$display", "Distance mesur\303\251e : %d", v00000247b162c360_0 {0 0 0};
|
||||
%vpi_call/w 3 57 "$display", "LEDs affich\303\251es : %b", v00000247b16ad5d0_0 {0 0 0};
|
||||
%vpi_call/w 3 59 "$finish" {0 0 0};
|
||||
%end;
|
||||
.thread T_5;
|
||||
# The file index is used to find the file name in the following table.
|
||||
:file_names 7;
|
||||
"N/A";
|
||||
"<interactive>";
|
||||
"-";
|
||||
"tb_top_ultrasonic_led.v";
|
||||
"top_ultrasonic_led.v";
|
||||
"Distance_display_led/distance_display_led.v";
|
||||
"./Ultrasonic/ultrasonic_fpga.v";
|
||||
@@ -2,23 +2,25 @@
|
||||
|
||||
module tb_top_ultrasonic_led;
|
||||
|
||||
reg clk;
|
||||
reg rst;
|
||||
reg start;
|
||||
reg echo;
|
||||
wire trig;
|
||||
reg clk = 0;
|
||||
reg start = 0;
|
||||
wire sig;
|
||||
wire [5:0] leds;
|
||||
|
||||
// Simulation du comportement du capteur (via tri-state)
|
||||
reg sig_driver = 0;
|
||||
reg sig_drive_enable = 0;
|
||||
assign sig = sig_drive_enable ? sig_driver : 1'bz;
|
||||
|
||||
// Instance du module top
|
||||
top_ultrasonic_led uut (
|
||||
.clk(clk),
|
||||
.rst(rst),
|
||||
.start(start),
|
||||
.echo(echo),
|
||||
.trig(trig),
|
||||
.sig(sig),
|
||||
.leds(leds)
|
||||
);
|
||||
|
||||
// Clock à 27 MHz ≈ 18.5 ns période
|
||||
always #18.5 clk = ~clk;
|
||||
|
||||
initial begin
|
||||
@@ -26,34 +28,33 @@ module tb_top_ultrasonic_led;
|
||||
$dumpfile("top_ultrasonic_led.vcd");
|
||||
$dumpvars(0, tb_top_ultrasonic_led);
|
||||
|
||||
clk = 0;
|
||||
rst = 1;
|
||||
start = 0;
|
||||
echo = 0;
|
||||
|
||||
#100;
|
||||
rst = 0;
|
||||
|
||||
#50;
|
||||
start = 1;
|
||||
#20;
|
||||
#50;
|
||||
start = 0;
|
||||
|
||||
// Attente du signal trig
|
||||
wait (trig == 1);
|
||||
// Attente du front montant TRIG
|
||||
wait (sig === 1);
|
||||
$display("TRIG HIGH at %t", $time);
|
||||
wait (trig == 0);
|
||||
|
||||
wait (sig === 0);
|
||||
$display("TRIG LOW at %t", $time);
|
||||
|
||||
repeat (500) @(posedge clk);
|
||||
echo = 1;
|
||||
#12000
|
||||
// Attente avant d'envoyer un echo simulé
|
||||
#3000;
|
||||
|
||||
echo = 0;
|
||||
// Simuler ECHO HIGH pendant un certain temps
|
||||
sig_driver = 1;
|
||||
sig_drive_enable = 1;
|
||||
#11600; // durée d'echo (ex : 10 cm -> ~580us => 580 * 27 clk = ~15660)
|
||||
sig_driver = 0;
|
||||
sig_drive_enable = 0;
|
||||
|
||||
repeat (500) @(posedge clk);
|
||||
// Attente que la mesure soit faite
|
||||
#200_000;
|
||||
|
||||
$display("Leds allumer : %b", leds);
|
||||
$display("Distance mesurée : %d", uut.ultrasonic_inst.distance);
|
||||
$display("LEDs affichées : %b", leds);
|
||||
|
||||
$finish;
|
||||
end
|
||||
|
||||
@@ -3,10 +3,9 @@ module top_ultrasonic_led (
|
||||
input wire start, // bouton de déclenchement
|
||||
inout wire sig, // broche unique pour trigger + echo
|
||||
output wire [5:0] leds // LEDs pour affichage distance
|
||||
output wire ws2812_dout // broche de données pour la LED WS2812 (optionnel)
|
||||
);
|
||||
|
||||
wire [8:0] distance;
|
||||
wire [15:0] distance;
|
||||
|
||||
// Module de mesure (version bidirectionnelle du capteur)
|
||||
ultrasonic_fpga ultrasonic_inst (
|
||||
@@ -22,11 +21,4 @@ module top_ultrasonic_led (
|
||||
.leds(leds)
|
||||
);
|
||||
|
||||
// Module d'affichage WS2812 (optionnel, si vous souhaitez utiliser une LED RGB)
|
||||
distance_ws2812_display ws2812_display_inst (
|
||||
.clk(clk),
|
||||
.distance(distance),
|
||||
.ws2812_dout(ws2812_dout)
|
||||
);
|
||||
|
||||
endmodule
|
||||
|
||||
24762
Semaine_2/Capteur_recule_bidirectionel_V2/top_ultrasonic_led.vcd
Normal file
24762
Semaine_2/Capteur_recule_bidirectionel_V2/top_ultrasonic_led.vcd
Normal file
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user