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forked from tanchou/Verilog

Bloquer a cause du tx

This commit is contained in:
Gamenight77
2025-05-13 12:22:50 +02:00
parent d1f907f7b6
commit e124c7c0c4
9 changed files with 523 additions and 37 deletions

View File

@@ -1,3 +1,3 @@
@echo off
echo === Lancement de GTKWave ===
gtkwave runs/uart_fifo.vcd
gtkwave runs/uart_tx_fifo.vcd

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@@ -6,7 +6,7 @@ setlocal enabledelayedexpansion
set OUT=runs/sim.vvp
:: Top-level testbench module
set TOP=tb_uart_fifo
set TOP=tb_uart_tx_fifo
:: Répertoires contenant des fichiers .v
set DIRS=src/verilog tests/verilog IP/verilog