Gamenight77
|
bc7518a231
|
Refactor ultrasonic FPGA module: add echo_div_counter and distance_counter for improved distance measurement logic
|
2025-04-25 09:23:33 +02:00 |
|
Gamenight77
|
d8708d1bd5
|
Refactor ultrasonic FPGA module: replace sig_in with sig_ok for improved signal handling and update ESP32 command processing to support new client list command
|
2025-04-25 09:17:22 +02:00 |
|
Gamenight77
|
5f3568ff9b
|
Enhance ultrasonic_fpga module: add comment to clarify FSM behavior in the Verilog file
|
2025-04-22 14:40:12 +02:00 |
|
Gamenight77
|
2be0cb20f6
|
Refactor ultrasonic_fpga module: improve code readability by adjusting comments and formatting in the Verilog file.
|
2025-04-22 14:38:50 +02:00 |
|
Gamenight77
|
3bb56e2f57
|
Init et début de réflexion sur le projet
|
2025-04-22 09:56:06 +02:00 |
|