4 Commits

Author	SHA1	Message	Date
Gamenight77	99e259f672	MAJ FIFO -> turn wire rd_data into register	2025-05-09 10:27:13 +02:00
Gamenight77	aaebf22d48	Tb for fifo working fine	2025-05-06 09:14:59 +02:00
Gamenight77	1d39c68b5c	Refactor uart_tx module to implement FIFO functionality with write and read pointers	2025-05-05 15:29:45 +02:00
Gamenight77	7156abf4e7	Add UART TX module and testbench, update scripts and constraints	2025-05-05 15:23:44 +02:00