#! :ivl_version "13.0 (devel)" "(s20250103-31-g7e238e7ca-dirty)"; :ivl_delay_selection "TYPICAL"; :vpi_time_precision - 12; :vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\system.vpi"; :vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_sys.vpi"; :vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_textio.vpi"; :vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\v2005_math.vpi"; :vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\va_math.vpi"; S_00000232894a6720 .scope module, "tb_uart_tx" "tb_uart_tx" 2 3; .timescale -9 -12; v00000232894d6a90_0 .net "busy", 0 0, v00000232894cb650_0; 1 drivers v00000232894d6b30_0 .var "clk", 0 0; v00000232894d73a0_0 .var "data", 7 0; v00000232894d7b20_0 .var "start", 0 0; v00000232894d6e00_0 .net "tx", 0 0, v00000232894e06e0_0; 1 drivers E_00000232894caed0 .event anyedge, v00000232894cb650_0; S_00000232894a68b0 .scope module, "tx_instance" "uart_tx" 2 16, 3 1 0, S_00000232894a6720; .timescale 0 0; .port_info 0 /INPUT 1 "clk"; .port_info 1 /INPUT 1 "start"; .port_info 2 /INPUT 8 "data"; .port_info 3 /OUTPUT 1 "tx"; .port_info 4 /OUTPUT 1 "busy"; P_00000232894e02d0 .param/l "BAUD_RATE" 0 3 10, +C4<00000000000000011100001000000000>; P_00000232894e0308 .param/l "BIT_PERIOD" 1 3 11, +C4<00000000000000000000000011101010>; P_00000232894e0340 .param/l "CLK_FREQ" 0 3 9, +C4<00000001100110111111110011000000>; P_00000232894e0378 .param/l "DATA" 1 3 15, C4<10>; P_00000232894e03b0 .param/l "IDLE" 1 3 13, C4<00>; P_00000232894e03e8 .param/l "START" 1 3 14, C4<01>; P_00000232894e0420 .param/l "STOP" 1 3 16, C4<11>; v00000232894a6a40_0 .var "bit_index", 3 0; v00000232894cb650_0 .var "busy", 0 0; v00000232894a6e60_0 .net "clk", 0 0, v00000232894d6b30_0; 1 drivers v00000232894e0460_0 .var "clk_count", 15 0; v00000232894e0500_0 .net "data", 7 0, v00000232894d73a0_0; 1 drivers v00000232894e05a0_0 .net "start", 0 0, v00000232894d7b20_0; 1 drivers v00000232894e0640_0 .var "state", 1 0; v00000232894e06e0_0 .var "tx", 0 0; v00000232894d69f0_0 .var "tx_data", 7 0; E_00000232894caf50 .event posedge, v00000232894a6e60_0; .scope S_00000232894a68b0; T_0 ; %pushi/vec4 1, 0, 1; %store/vec4 v00000232894e06e0_0, 0, 1; %pushi/vec4 0, 0, 1; %store/vec4 v00000232894cb650_0, 0, 1; %pushi/vec4 0, 0, 2; %store/vec4 v00000232894e0640_0, 0, 2; %pushi/vec4 0, 0, 4; %store/vec4 v00000232894a6a40_0, 0, 4; %pushi/vec4 0, 0, 16; %store/vec4 v00000232894e0460_0, 0, 16; %pushi/vec4 0, 0, 8; %store/vec4 v00000232894d69f0_0, 0, 8; %end; .thread T_0; .scope S_00000232894a68b0; T_1 ; %wait E_00000232894caf50; %load/vec4 v00000232894e0640_0; %dup/vec4; %pushi/vec4 0, 0, 2; %cmp/u; %jmp/1 T_1.0, 6; %dup/vec4; %pushi/vec4 1, 0, 2; %cmp/u; %jmp/1 T_1.1, 6; %dup/vec4; %pushi/vec4 2, 0, 2; %cmp/u; %jmp/1 T_1.2, 6; %dup/vec4; %pushi/vec4 3, 0, 2; %cmp/u; %jmp/1 T_1.3, 6; %jmp T_1.4; T_1.0 ; %pushi/vec4 0, 0, 1; %assign/vec4 v00000232894cb650_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v00000232894e06e0_0, 0; %load/vec4 v00000232894e05a0_0; %flag_set/vec4 9; %flag_get/vec4 9; %jmp/0 T_1.7, 9; %load/vec4 v00000232894cb650_0; %nor/r; %and; T_1.7; %flag_set/vec4 8; %jmp/0xz T_1.5, 8; %load/vec4 v00000232894e0500_0; %assign/vec4 v00000232894d69f0_0, 0; %pushi/vec4 0, 0, 4; %assign/vec4 v00000232894a6a40_0, 0; %pushi/vec4 0, 0, 16; %assign/vec4 v00000232894e0460_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v00000232894cb650_0, 0; %pushi/vec4 1, 0, 2; %assign/vec4 v00000232894e0640_0, 0; T_1.5 ; %jmp T_1.4; T_1.1 ; %load/vec4 v00000232894e0460_0; %pad/u 32; %cmpi/u 233, 0, 32; %jmp/0xz T_1.8, 5; %load/vec4 v00000232894e0460_0; %addi 1, 0, 16; %assign/vec4 v00000232894e0460_0, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v00000232894e06e0_0, 0; %jmp T_1.9; T_1.8 ; %pushi/vec4 2, 0, 2; %assign/vec4 v00000232894e0640_0, 0; %pushi/vec4 0, 0, 16; %assign/vec4 v00000232894e0460_0, 0; T_1.9 ; %jmp T_1.4; T_1.2 ; %load/vec4 v00000232894e0460_0; %pad/u 32; %cmpi/u 233, 0, 32; %jmp/0xz T_1.10, 5; %load/vec4 v00000232894e0460_0; %addi 1, 0, 16; %assign/vec4 v00000232894e0460_0, 0; %jmp T_1.11; T_1.10 ; %load/vec4 v00000232894a6a40_0; %pad/u 32; %cmpi/u 8, 0, 32; %jmp/0xz T_1.12, 5; %load/vec4 v00000232894d69f0_0; %load/vec4 v00000232894a6a40_0; %part/u 1; %assign/vec4 v00000232894e06e0_0, 0; %load/vec4 v00000232894a6a40_0; %addi 1, 0, 4; %assign/vec4 v00000232894a6a40_0, 0; %pushi/vec4 0, 0, 16; %assign/vec4 v00000232894e0460_0, 0; %jmp T_1.13; T_1.12 ; %pushi/vec4 3, 0, 2; %assign/vec4 v00000232894e0640_0, 0; T_1.13 ; T_1.11 ; %jmp T_1.4; T_1.3 ; %pushi/vec4 1, 0, 1; %assign/vec4 v00000232894e06e0_0, 0; %load/vec4 v00000232894e0460_0; %pad/u 32; %cmpi/u 233, 0, 32; %jmp/0xz T_1.14, 5; %load/vec4 v00000232894e0460_0; %addi 1, 0, 16; %assign/vec4 v00000232894e0460_0, 0; %jmp T_1.15; T_1.14 ; %pushi/vec4 0, 0, 16; %assign/vec4 v00000232894e0460_0, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v00000232894cb650_0, 0; %pushi/vec4 0, 0, 2; %assign/vec4 v00000232894e0640_0, 0; T_1.15 ; %jmp T_1.4; T_1.4 ; %pop/vec4 1; %jmp T_1; .thread T_1; .scope S_00000232894a6720; T_2 ; %pushi/vec4 0, 0, 1; %store/vec4 v00000232894d6b30_0, 0, 1; %pushi/vec4 0, 0, 1; %store/vec4 v00000232894d7b20_0, 0, 1; %pushi/vec4 0, 0, 8; %store/vec4 v00000232894d73a0_0, 0, 8; %end; .thread T_2; .scope S_00000232894a6720; T_3 ; %delay 18500, 0; %load/vec4 v00000232894d6b30_0; %inv; %store/vec4 v00000232894d6b30_0, 0, 1; %jmp T_3; .thread T_3; .scope S_00000232894a6720; T_4 ; %vpi_call 2 25 "$dumpfile", "uart_tx.vcd" {0 0 0}; %vpi_call 2 26 "$dumpvars", 32'sb00000000000000000000000000000000, S_00000232894a6720 {0 0 0}; %delay 100000, 0; %pushi/vec4 165, 0, 8; %assign/vec4 v00000232894d73a0_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v00000232894d7b20_0, 0; %delay 37000, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v00000232894d7b20_0, 0; T_4.0 ; %load/vec4 v00000232894d6a90_0; %pad/u 32; %pushi/vec4 0, 0, 32; %cmp/e; %flag_get/vec4 4; %cmpi/ne 1, 0, 1; %jmp/0xz T_4.1, 6; %wait E_00000232894caed0; %jmp T_4.0; T_4.1 ; %delay 1000000, 0; %pushi/vec4 60, 0, 8; %assign/vec4 v00000232894d73a0_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v00000232894d7b20_0, 0; %delay 37000, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v00000232894d7b20_0, 0; T_4.2 ; %load/vec4 v00000232894d6a90_0; %pad/u 32; %pushi/vec4 0, 0, 32; %cmp/e; %flag_get/vec4 4; %cmpi/ne 1, 0, 1; %jmp/0xz T_4.3, 6; %wait E_00000232894caed0; %jmp T_4.2; T_4.3 ; %delay 1000000, 0; %vpi_call 2 46 "$stop" {0 0 0}; %end; .thread T_4; # The file index is used to find the file name in the following table. :file_names 4; "N/A"; ""; "tb_uart_tx.v"; "uart_tx.v";