forked from tanchou/Verilog
861c9869f5
- Created DHT11 interface in Verilog to handle communication with DHT11 sensor. - Implemented LED control logic to indicate sensor status and data readiness. - Added project scripts for building, cleaning, and simulating the design. - Established constraints for FPGA pin assignments. - Developed testbench for DHT11 UART communication. - Updated README files to reflect project functionality and commands.
5 lines
49 B
Plaintext
5 lines
49 B
Plaintext
runs
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.vscode
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workspace.code-workspace
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*.pyc
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.idea |