This website requires JavaScript.
Explore
Help
Sign In
verlan
/
Verilog_Louis
Watch
1
Star
0
Fork
0
You've already forked Verilog_Louis
forked from
tanchou/Verilog
Code
Pull Requests
Activity
Files
425cc8d00c245669ebe7f6c92fce08ce6f6ff881
Verilog_Louis
/
Semaine_7
/
DHT11_UART
/
IP
/
verilog
History
Gamenight77
425cc8d00c
Refactor DHT11 interface to support 16-bit temperature and humidity data, update checksum handling, and improve state machine logic
2025-05-27 13:34:59 +02:00
..
dht11_interface.v
Refactor DHT11 interface to support 16-bit temperature and humidity data, update checksum handling, and improve state machine logic
2025-05-27 13:34:59 +02:00
fifo.v
init semaine 7
2025-05-25 19:04:56 +02:00
txuartlite.v
init semaine 7
2025-05-25 19:04:56 +02:00
uart_tx_fifo.v
init semaine 7
2025-05-25 19:04:56 +02:00