Gamenight77 99e259f672 MAJ FIFO -> turn wire rd_data into register

2025-05-09 10:27:13 +02:00

..

top_uart_loopback1.v

MAJ FIFO -> turn wire rd_data into register

2025-05-09 10:27:13 +02:00

top_uart_loopback.v

Update TX data assignment in UART loopback module to send fixed value

2025-05-07 18:05:02 +02:00

uart_rx.v

uart_rx valid

2025-05-05 09:51:23 +02:00

uart_tx.v

Création de la structure du uart fifo

2025-05-06 09:42:26 +02:00