forked from tanchou/Verilog
- Created DHT11 interface in Verilog to handle communication with DHT11 sensor. - Implemented LED control logic to indicate sensor status and data readiness. - Added project scripts for building, cleaning, and simulating the design. - Established constraints for FPGA pin assignments. - Developed testbench for DHT11 UART communication. - Updated README files to reflect project functionality and commands.
5 lines
74 B
Batchfile
5 lines
74 B
Batchfile
@echo off
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echo === Nettoyage du dossier runs ===
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rd /s /q runs
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mkdir runs
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