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Verilog_Louis
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778f4e2e57cccca0d66589d90b2dcfb059ab93a7
Verilog_Louis
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Semaine_7
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Gamenight77
778f4e2e57
Update UART baud rate to 500,000 in ESP32 and FPGA modules
2025-05-28 15:51:46 +02:00
..
DHT11
Refactor DHT11 interface to support 16-bit temperature and humidity data, update checksum handling, and improve state machine logic
2025-05-27 13:34:59 +02:00
DHT11_UART
Code FPGA fonctionnel
2025-05-27 15:36:40 +02:00
ESP32
Update UART baud rate to 500,000 in ESP32 and FPGA modules
2025-05-28 15:51:46 +02:00