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Verilog_Louis
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897f829e40c06bb7e79bbc9786cdee6a2b7c56f6
Verilog_Louis
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Semaine 1
/
Capteur_recule_bidirectionel
History
Gamenight77
897f829e40
Refactor ultrasonic_fpga module: update distance output and state handling; add top_ultrason_uart module for integration with UART and ultrasonic sensor
2025-04-17 13:02:47 +02:00
..
Distance_display_led
Add testbench for top_ultrasonic_led module
2025-04-16 14:58:04 +02:00
distance_ws2812_display
Add distance_ws2812_display module and testbench; implement ws2812_driver for LED control
2025-04-16 17:07:29 +02:00
Ultrasonic
Refactor ultrasonic_fpga module: update distance output and state handling; add top_ultrason_uart module for integration with UART and ultrasonic sensor
2025-04-17 13:02:47 +02:00
tb_top_ultrasonic_led.v
Add testbench for top_ultrasonic_led module
2025-04-16 14:58:04 +02:00
top_ultrasonic_led_tb.vvp
Add testbench for top_ultrasonic_led module
2025-04-16 14:58:04 +02:00
top_ultrasonic_led.v
Add distance_ws2812_display module and testbench; implement ws2812_driver for LED control
2025-04-16 17:07:29 +02:00
top_ultrasonic_led.vcd
Add testbench for top_ultrasonic_led module
2025-04-16 14:58:04 +02:00
