Gamenight77 93e0e96798 Add WAIT state to FSM and implement delay mechanism in UART module

2025-05-07 18:07:45 +02:00

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FIFO

Tb for fifo working fine

2025-05-06 09:14:59 +02:00

UART

Update TX data assignment in UART loopback module to send fixed value

2025-05-07 18:05:02 +02:00

UART_FIFO

Refactor UART FIFO implementation: update top-level module and integrate RX/TX FIFO functionality

2025-05-07 09:46:43 +02:00

UART_ULTRASON

Add WAIT state to FSM and implement delay mechanism in UART module

2025-05-07 18:07:45 +02:00