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forked from tanchou/Verilog
Files
Verilog_Louis/Semaine_6/DHT11/project.bat

6 lines
243 B
Batchfile

@call c:\oss-cad-suite\environment.bat
@echo off
if "%1"=="sim" call scripts\windows\simulate.bat
if "%1"=="wave" call scripts\windows\gtkwave.bat
if "%1"=="clean" call scripts\windows\clean.bat
if "%1"=="build" call scripts\windows\build.bat