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Verilog_Louis
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cd14d82add9d6d40739db225604282d5b94ef32b
Verilog_Louis
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Semaine_4
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UART_FIFO
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scripts
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Gamenight77
abef18227c
Refactor UART FIFO implementation: update top-level module and integrate RX/TX FIFO functionality
2025-05-07 09:46:43 +02:00
..
build.bat
Refactor UART FIFO implementation: update top-level module and integrate RX/TX FIFO functionality
2025-05-07 09:46:43 +02:00
clean.bat
Création de la structure du uart fifo
2025-05-06 09:42:26 +02:00
gtkwave.bat
Refactor UART FIFO implementation: update top-level module and integrate RX/TX FIFO functionality
2025-05-07 09:46:43 +02:00
simulate.bat
Refactor UART FIFO implementation: update top-level module and integrate RX/TX FIFO functionality
2025-05-07 09:46:43 +02:00
