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verlan
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Verilog_Louis
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d69a0a47530890de43e3432add28ef592e2b497d
Verilog_Louis
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Semaine_5
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Louis TANCHOU
4c3e40b266
Refactor FIFO module: update pointer and count handling for improved functionality
2025-05-22 14:49:36 +02:00
..
DHT11
Refactor project scripts for Windows and Linux: update paths and create new scripts for build, clean, simulate, and GTKWave functionalities.
2025-05-15 09:26:34 +02:00
DHT11_LEDS
Refactor project scripts for Windows and Linux: update paths and create new scripts for build, clean, simulate, and GTKWave functionalities.
2025-05-15 09:26:34 +02:00
DHT11_UART
Refactor FIFO module: update pointer and count handling for improved functionality
2025-05-22 14:49:36 +02:00
UART_ULTRASON_COMMANDS
Fix path in build script and improve comments in testbench for ultrasonic commands
2025-05-16 17:06:57 +02:00