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Verilog_Louis/Semaine_4/FIFO/scripts/gtkwave.bat

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Add UART TX module and testbench, update scripts and constraints
2025-05-05 15:23:44 +02:00
@echo off
echo === Lancement de GTKWave ===
Tb for fifo working fine
2025-05-06 09:14:59 +02:00
gtkwave runs/fifo.vcd
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