forked from tanchou/Verilog
		
	
		
			
	
	
		
			83 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
		
		
			
		
	
	
			83 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
|   | #!  | ||
|  | :ivl_version "13.0 (devel)" "(s20250103-26-gb0c57ab17-dirty)"; | ||
|  | :ivl_delay_selection "TYPICAL"; | ||
|  | :vpi_time_precision + 0; | ||
|  | :vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\system.vpi"; | ||
|  | :vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_sys.vpi"; | ||
|  | :vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_textio.vpi"; | ||
|  | :vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\v2005_math.vpi"; | ||
|  | :vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\va_math.vpi"; | ||
|  | S_000001add64e99e0 .scope module, "tb_counter" "tb_counter" 2 1; | ||
|  |  .timescale 0 0; | ||
|  | v000001add64e9da0_0 .var "clk", 0 0; | ||
|  | v000001add64e81c0_0 .net "count", 3 0, v000001add64b6a10_0;  1 drivers | ||
|  | v000001add64e8260_0 .var "rst", 0 0; | ||
|  | S_000001add64e9b70 .scope module, "counter_inst" "counter" 2 6, 3 1 0, S_000001add64e99e0; | ||
|  |  .timescale 0 0; | ||
|  |     .port_info 0 /INPUT 1 "clk"; | ||
|  |     .port_info 1 /INPUT 1 "rst"; | ||
|  |     .port_info 2 /OUTPUT 4 "count"; | ||
|  | v000001add64b6e60_0 .net "clk", 0 0, v000001add64e9da0_0;  1 drivers | ||
|  | v000001add64b6a10_0 .var "count", 3 0; | ||
|  | v000001add64e9d00_0 .net "rst", 0 0, v000001add64e8260_0;  1 drivers | ||
|  | E_000001add63cc830 .event posedge, v000001add64b6e60_0; | ||
|  |     .scope S_000001add64e9b70; | ||
|  | T_0 ; | ||
|  |     %wait E_000001add63cc830; | ||
|  |     %load/vec4 v000001add64e9d00_0; | ||
|  |     %flag_set/vec4 8; | ||
|  |     %jmp/0xz  T_0.0, 8; | ||
|  |     %pushi/vec4 0, 0, 4; | ||
|  |     %assign/vec4 v000001add64b6a10_0, 0; | ||
|  |     %jmp T_0.1; | ||
|  | T_0.0 ; | ||
|  |     %load/vec4 v000001add64b6a10_0; | ||
|  |     %addi 1, 0, 4; | ||
|  |     %assign/vec4 v000001add64b6a10_0, 0; | ||
|  | T_0.1 ; | ||
|  |     %jmp T_0; | ||
|  |     .thread T_0; | ||
|  |     .scope S_000001add64e99e0; | ||
|  | T_1 ; | ||
|  |     %delay 5, 0; | ||
|  |     %load/vec4 v000001add64e9da0_0; | ||
|  |     %inv; | ||
|  |     %store/vec4 v000001add64e9da0_0, 0, 1; | ||
|  |     %jmp T_1; | ||
|  |     .thread T_1; | ||
|  |     .scope S_000001add64e99e0; | ||
|  | T_2 ; | ||
|  |     %vpi_call 2 15 "$dumpfile", "dump.vcd" {0 0 0}; | ||
|  |     %vpi_call 2 16 "$dumpvars", 32'sb00000000000000000000000000000000, S_000001add64e9b70 {0 0 0}; | ||
|  |     %pushi/vec4 0, 0, 1; | ||
|  |     %assign/vec4 v000001add64e9da0_0, 0; | ||
|  |     %pushi/vec4 0, 0, 1; | ||
|  |     %assign/vec4 v000001add64e8260_0, 0; | ||
|  |     %delay 20, 0; | ||
|  |     %pushi/vec4 1, 0, 1; | ||
|  |     %store/vec4 v000001add64e8260_0, 0, 1; | ||
|  |     %delay 80, 0; | ||
|  |     %pushi/vec4 0, 0, 1; | ||
|  |     %store/vec4 v000001add64e8260_0, 0, 1; | ||
|  |     %delay 50, 0; | ||
|  |     %pushi/vec4 1, 0, 1; | ||
|  |     %store/vec4 v000001add64e8260_0, 0, 1; | ||
|  |     %delay 20, 0; | ||
|  |     %vpi_call 2 26 "$finish" {0 0 0}; | ||
|  |     %end; | ||
|  |     .thread T_2; | ||
|  |     .scope S_000001add64e99e0; | ||
|  | T_3 ; | ||
|  |     %delay 5, 0; | ||
|  |     %load/vec4 v000001add64e9da0_0; | ||
|  |     %inv; | ||
|  |     %store/vec4 v000001add64e9da0_0, 0, 1; | ||
|  |     %jmp T_3; | ||
|  |     .thread T_3; | ||
|  | # The file index is used to find the file name in the following table. | ||
|  | :file_names 4; | ||
|  |     "N/A"; | ||
|  |     "<interactive>"; | ||
|  |     ".\tb_counter.v"; | ||
|  |     ".\counter.v"; |