Verilog_Louis/Help/presentation_examples/blink/src/verilog/blink_top.v

module blink_top
(
    input wire clk,
    output wire led
);

blink #(
    .CLK_SPEED(27_000_000)
) blink_inst (
    .clk(clk),
    .led(led)
);

endmodule