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forked from tanchou/Verilog

Refactor DHT11 module and testbench: update timing parameters, adjust state machine, and correct simulation script paths

This commit is contained in:
Gamenight77
2025-05-21 18:11:28 +02:00
parent cbebf620d5
commit 434381e9b6
5 changed files with 112 additions and 111 deletions

View File

@@ -1,5 +1,8 @@
@call c:\oss-cad-suite\environment.bat
@echo off
mkdir runs
if "%1"=="sim" call scripts\windows\simulate.bat
if "%1"=="wave" call scripts\windows\gtkwave.bat
if "%1"=="clean" call scripts\windows\clean.bat