Add initial design files for 27 MHz clock counter

- Created tangnano20k.cst to define I/O locations for clock, button, and LEDs.
- Implemented top.v module to instantiate the counter with clock and button inputs, and 4-bit count output.

Introduction/counter/top.v

@@ -0,0 +1,13 @@
+module top (
+    input wire clk,
+    input wire btn1,
+    output wire [3:0] count
+);
+
+    counter uut (
+        .clk(clk),
+        .btn1(btn1),
+        .count(count)
+    );
+
+endmodule