Fix build script and update state machine in UART loopback module

2025-05-07 10:39:52 +02:00
parent ec1c69cf8f
commit 83c40bee28
4 changed files with 181 additions and 2 deletions
--- a/Semaine_4/UART_ULTRASON/src/verilog/top_uart_ultrason.v
+++ b/Semaine_4/UART_ULTRASON/src/verilog/top_uart_ultrason.v
@@ -56,7 +56,7 @@ module top_uart_ultrason (
            SEND_LOW: begin
                wr_en <= 1;
                wr_data <= distance[7:0]; // Octet LSB
-                state <= IDLE;
+                state <= SEND_HIGH;
            end

            SEND_HIGH: begin