forked from tanchou/Verilog
Add DHT11 interface and UART integration for ultrasonic sensor project
- Created DHT11 interface in Verilog to handle communication with DHT11 sensor. - Implemented LED control logic to indicate sensor status and data readiness. - Added project scripts for building, cleaning, and simulating the design. - Established constraints for FPGA pin assignments. - Developed testbench for DHT11 UART communication. - Updated README files to reflect project functionality and commands.
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@@ -6,7 +6,7 @@ setlocal enabledelayedexpansion
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set OUT=runs/sim.vvp
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:: Top-level testbench module
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set TOP=dht11_interface
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set TOP=tb_dht11
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:: Répertoires contenant des fichiers .v
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set DIRS=src/verilog tests/verilog IP/verilog
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