Add DHT11 interface and UART integration for ultrasonic sensor project

- Created DHT11 interface in Verilog to handle communication with DHT11 sensor.
- Implemented LED control logic to indicate sensor status and data readiness.
- Added project scripts for building, cleaning, and simulating the design.
- Established constraints for FPGA pin assignments.
- Developed testbench for DHT11 UART communication.
- Updated README files to reflect project functionality and commands.

Semaine_5/DHT11_LEDS/tests/verilog/tb_dht11_uart.v

@@ -0,0 +1,27 @@
+`timescale 1ns/1ps
+
+module tb_dht11;
+
+    reg clk = 0;
+    always #18.5 clk = ~clk; // Génère une clock 27 MHz
+
+    // === Simulation du module DHT11 ===
+
+
+    // === Module DHT11 INTERFACE ===
+
+
+    // === TEST SEQUENCE ===
+    initial begin
+        $dumpfile("runs/wave.vcd");
+        $dumpvars(0, tb_dht11);
+
+        $display("==== Start DHT11 Test ====");
+        
+        
+
+        $display("==== End DHT11 Test ====");
+        $finish;
+    end
+
+endmodule