Tb for fifo working fine

2025-05-06 09:14:59 +02:00
parent 1d39c68b5c
commit aaebf22d48
4 changed files with 88 additions and 5 deletions
--- a/Semaine_4/FIFO/scripts/simulate.bat
+++ b/Semaine_4/FIFO/scripts/simulate.bat
@@ -6,7 +6,7 @@ setlocal enabledelayedexpansion
 set OUT=runs/sim.vvp

 :: Top-level testbench module
-set TOP=tb_uart
+set TOP=tb_fifo

 :: Répertoires contenant des fichiers .v
 set DIRS=src/verilog tests/verilog IP/verilog