struct

2025-05-02 15:51:18 +02:00
parent 0faab53c30
commit f5e73d7379
105 changed files with 707398 additions and 1 deletions
--- a/Help/presentation_examples/blink/src/verilog/blink_top.v
+++ b/Help/presentation_examples/blink/src/verilog/blink_top.v
@@ -0,0 +1,14 @@
+module blink_top
+(
+    input wire clk,
+    output wire led
+);
+
+blink #(
+    .CLK_SPEED(27_000_000)
+) blink_inst (
+    .clk(clk),
+    .led(led)
+);
+
+endmodule