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forked from tanchou/Verilog
Commit Graph

4 Commits

Author SHA1 Message Date
Gamenight77
73cc201b6d Add README and project documentation for FPGA and ESP32 integration 2025-04-22 16:46:03 +02:00
Gamenight77
11b14ced36 Update Projet_esp32.txt: add architecture diagram and detailed descriptions for UART modules 2025-04-22 16:38:00 +02:00
Gamenight77
574ace75ef Readme 2025-04-22 14:32:34 +02:00
Gamenight77
3bb56e2f57 Init et début de réflexion sur le projet 2025-04-22 09:56:06 +02:00