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Verilog_Louis
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Verilog_Louis
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Semaine_7
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Louis TANCHOU
20cbaace08
FPGA_ESP32_WIFI_Fonctionnel 3MB
2025-06-03 09:04:26 +02:00
..
DHT11
Refactor DHT11 interface to support 16-bit temperature and humidity data, update checksum handling, and improve state machine logic
2025-05-27 13:34:59 +02:00
DHT11_UART
Code FPGA fonctionnel
2025-05-27 15:36:40 +02:00
ESP32
FPGA_ESP32_WIFI_Fonctionnel 3MB
2025-06-03 09:04:26 +02:00
