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verlan
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Verilog_Louis
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ec1c69cf8f4baf244a729b45484865efc093247d
Verilog_Louis
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Semaine_4
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Gamenight77
ec1c69cf8f
Implement UART and ultrasonic sensor integration with FIFO for data transmission
2025-05-07 10:27:17 +02:00
..
FIFO
Tb for fifo working fine
2025-05-06 09:14:59 +02:00
UART
Refactor UART FIFO implementation: update top-level module and integrate RX/TX FIFO functionality
2025-05-07 09:46:43 +02:00
UART_FIFO
Refactor UART FIFO implementation: update top-level module and integrate RX/TX FIFO functionality
2025-05-07 09:46:43 +02:00
UART_ULTRASON
Implement UART and ultrasonic sensor integration with FIFO for data transmission
2025-05-07 10:27:17 +02:00
