2025-04-28 09:22:17 +02:00
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#!
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:ivl_version "13.0 (devel)" "(s20250103-31-g7e238e7ca-dirty)";
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:ivl_delay_selection "TYPICAL";
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:vpi_time_precision - 12;
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:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\system.vpi";
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:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_sys.vpi";
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:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_textio.vpi";
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:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\v2005_math.vpi";
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:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\va_math.vpi";
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2025-04-28 10:33:36 +02:00
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S_000002bd53c55940 .scope module, "tb_ultrasonic_fpga" "tb_ultrasonic_fpga" 2 3;
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2025-04-28 09:22:17 +02:00
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.timescale -9 -12;
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2025-04-28 10:33:36 +02:00
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P_000002bd53c4f590 .param/l "CLK_FREQ" 0 2 13, +C4<00000001100110111111110011000000>;
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v000002bd53cd08c0_0 .var "clk", 0 0;
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v000002bd53cd10e0_0 .net "distance", 15 0, v000002bd53c55740_0; 1 drivers
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RS_000002bd53c7f018 .resolv tri, L_000002bd53cd19a0, L_000002bd53cd0e60;
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v000002bd53cd0a00_0 .net8 "sig", 0 0, RS_000002bd53c7f018; 2 drivers
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v000002bd53cd1cc0_0 .var "start", 0 0;
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S_000002bd53c55ce0 .scope module, "sensor" "ultrasonic_sensor" 2 22, 3 1 0, S_000002bd53c55940;
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2025-04-28 09:22:17 +02:00
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.timescale -9 -12;
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.port_info 0 /INPUT 1 "clk";
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.port_info 1 /INOUT 1 "signal";
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2025-04-28 10:33:36 +02:00
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P_000002bd53c55e70 .param/l "CLK_FREQ" 0 3 5, +C4<00000001100110111111110011000000>;
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P_000002bd53c55ea8 .param/l "S_MEASURE_TRIG" 1 3 20, C4<001>;
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P_000002bd53c55ee0 .param/l "S_SEND_ECHO" 1 3 21, C4<010>;
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P_000002bd53c55f18 .param/l "S_WAIT_TRIG" 1 3 19, C4<000>;
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P_000002bd53c55f50 .param/l "TRIG_PULSE_CYCLES" 1 3 23, +C4<00000000000000000000000100001110>;
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o000002bd53c7eec8 .functor BUFZ 1, c4<z>; HiZ drive
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; Elide local net with no drivers, v000002bd53c54ca0_0 name=_ivl_0
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v000002bd53c551a0_0 .net "clk", 0 0, v000002bd53cd08c0_0; 1 drivers
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v000002bd53c557e0_0 .var "echo_counter", 31 0;
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v000002bd53c55380_0 .var "echo_delay_counter", 15 0;
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v000002bd53c54f20_0 .var "echo_sended", 0 0;
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v000002bd53c54e80_0 .var "next_state", 2 0;
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v000002bd53c54d40_0 .var "sig_dir", 0 0;
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v000002bd53c55600_0 .net8 "signal", 0 0, RS_000002bd53c7f018; alias, 2 drivers
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v000002bd53c55420_0 .var "signal_out", 0 0;
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v000002bd53c54a20_0 .var "state", 2 0;
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v000002bd53c552e0_0 .var "trig_counter", 15 0;
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v000002bd53c556a0_0 .var "valid_trig", 0 0;
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E_000002bd53c4e950 .event posedge, v000002bd53c551a0_0;
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E_000002bd53c4ead0 .event anyedge, v000002bd53c54a20_0, v000002bd53c55600_0, v000002bd53c556a0_0, v000002bd53c54f20_0;
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L_000002bd53cd0e60 .functor MUXZ 1, o000002bd53c7eec8, v000002bd53c55420_0, v000002bd53c54d40_0, C4<>;
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S_000002bd53c72d70 .scope module, "uut" "ultrasonic_fpga" 2 15, 4 1 0, S_000002bd53c55940;
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2025-04-28 09:22:17 +02:00
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.timescale -9 -12;
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.port_info 0 /INPUT 1 "clk";
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.port_info 1 /INPUT 1 "start";
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.port_info 2 /INOUT 1 "sig";
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.port_info 3 /OUTPUT 16 "distance";
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.port_info 4 /OUTPUT 3 "state";
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2025-04-28 10:33:36 +02:00
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P_000002bd53c72f00 .param/l "CLK_FREQ" 0 4 2, +C4<00000001100110111111110011000000>;
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P_000002bd53c72f38 .param/l "COMPUTE" 1 4 27, C4<101>;
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P_000002bd53c72f70 .param/l "DIST_DIVISOR" 1 4 32, +C4<00000000000000000000011000011110>;
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P_000002bd53c72fa8 .param/l "DONE" 1 4 28, C4<110>;
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P_000002bd53c72fe0 .param/l "IDLE" 1 4 22, C4<000>;
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P_000002bd53c73018 .param/l "MAX_CM" 1 4 33, +C4<00000000000000000000000101011110>;
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P_000002bd53c73050 .param/l "MEASURE_ECHO" 1 4 26, C4<100>;
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P_000002bd53c73088 .param/l "TIMEOUT_CYCLES" 1 4 34, +C4<11111111111111111111100110001001>;
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P_000002bd53c730c0 .param/l "TRIG_HIGH" 1 4 23, C4<001>;
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P_000002bd53c730f8 .param/l "TRIG_LOW" 1 4 24, C4<010>;
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P_000002bd53c73130 .param/l "TRIG_PULSE_CYCLES" 1 4 31, +C4<00000000000000000000000100001110>;
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P_000002bd53c73168 .param/l "WAIT_ECHO" 1 4 25, C4<011>;
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P_000002bd53c731a0 .param/l "WAIT_NEXT" 1 4 29, C4<111>;
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P_000002bd53c731d8 .param/l "WAIT_NEXT_CYCLES" 1 4 36, +C4<0000000000000000000000000000000000000000001010010011001011100000>;
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o000002bd53c7f168 .functor BUFZ 1, c4<z>; HiZ drive
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; Elide local net with no drivers, v000002bd53c55560_0 name=_ivl_0
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v000002bd53c55100_0 .net "clk", 0 0, v000002bd53cd08c0_0; alias, 1 drivers
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v000002bd53c55740_0 .var "distance", 15 0;
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v000002bd53c55880_0 .var "distance_counter", 15 0;
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v000002bd53c54980_0 .var "echo_counter", 31 0;
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v000002bd53c54ac0_0 .var "echo_div_counter", 31 0;
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v000002bd53c54fc0_0 .net8 "sig", 0 0, RS_000002bd53c7f018; alias, 2 drivers
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v000002bd53c55240_0 .var "sig_dir", 0 0;
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v000002bd53c54b60_0 .var "sig_int", 0 0;
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v000002bd53c54c00_0 .var "sig_ok", 0 0;
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v000002bd53c54de0_0 .var "sig_out", 0 0;
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v000002bd53c55060_0 .net "start", 0 0, v000002bd53cd1cc0_0; 1 drivers
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v000002bd53cd1f40_0 .var "state", 2 0;
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v000002bd53cd2620_0 .var "trig_counter", 15 0;
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v000002bd53cd0dc0_0 .var "wait_counter", 31 0;
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L_000002bd53cd19a0 .functor MUXZ 1, o000002bd53c7f168, v000002bd53c54de0_0, v000002bd53c55240_0, C4<>;
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.scope S_000002bd53c72d70;
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2025-04-28 09:22:17 +02:00
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T_0 ;
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2025-04-28 10:33:36 +02:00
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%pushi/vec4 0, 0, 16;
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%store/vec4 v000002bd53cd2620_0, 0, 16;
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%pushi/vec4 0, 0, 32;
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%store/vec4 v000002bd53c54980_0, 0, 32;
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%pushi/vec4 0, 0, 32;
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%store/vec4 v000002bd53c54ac0_0, 0, 32;
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%pushi/vec4 0, 0, 16;
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%store/vec4 v000002bd53c55880_0, 0, 16;
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%end;
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2025-04-28 09:22:17 +02:00
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.thread T_0;
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2025-04-28 10:33:36 +02:00
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.scope S_000002bd53c72d70;
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2025-04-28 09:22:17 +02:00
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T_1 ;
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2025-04-28 10:33:36 +02:00
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%wait E_000002bd53c4e950;
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%load/vec4 v000002bd53c54fc0_0;
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%assign/vec4 v000002bd53c54b60_0, 0;
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%load/vec4 v000002bd53c54b60_0;
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%assign/vec4 v000002bd53c54c00_0, 0;
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%jmp T_1;
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.thread T_1;
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.scope S_000002bd53c72d70;
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T_2 ;
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%wait E_000002bd53c4e950;
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%load/vec4 v000002bd53cd1f40_0;
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2025-04-28 09:22:17 +02:00
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%dup/vec4;
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%pushi/vec4 0, 0, 3;
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%cmp/u;
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2025-04-28 10:33:36 +02:00
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%jmp/1 T_2.0, 6;
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2025-04-28 09:22:17 +02:00
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%dup/vec4;
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%pushi/vec4 1, 0, 3;
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%cmp/u;
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2025-04-28 10:33:36 +02:00
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%jmp/1 T_2.1, 6;
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2025-04-28 09:22:17 +02:00
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%dup/vec4;
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%pushi/vec4 2, 0, 3;
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%cmp/u;
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2025-04-28 10:33:36 +02:00
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%jmp/1 T_2.2, 6;
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2025-04-28 09:22:17 +02:00
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%dup/vec4;
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%pushi/vec4 3, 0, 3;
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%cmp/u;
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2025-04-28 10:33:36 +02:00
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%jmp/1 T_2.3, 6;
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2025-04-28 09:22:17 +02:00
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%dup/vec4;
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%pushi/vec4 4, 0, 3;
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%cmp/u;
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2025-04-28 10:33:36 +02:00
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%jmp/1 T_2.4, 6;
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2025-04-28 09:22:17 +02:00
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%dup/vec4;
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%pushi/vec4 5, 0, 3;
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%cmp/u;
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2025-04-28 10:33:36 +02:00
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%jmp/1 T_2.5, 6;
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2025-04-28 09:22:17 +02:00
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%dup/vec4;
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%pushi/vec4 6, 0, 3;
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%cmp/u;
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2025-04-28 10:33:36 +02:00
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%jmp/1 T_2.6, 6;
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%dup/vec4;
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%pushi/vec4 7, 0, 3;
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%cmp/u;
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%jmp/1 T_2.7, 6;
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2025-04-28 09:22:17 +02:00
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%pushi/vec4 0, 0, 3;
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2025-04-28 10:33:36 +02:00
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%assign/vec4 v000002bd53cd1f40_0, 0;
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%jmp T_2.9;
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T_2.0 ;
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2025-04-28 09:22:17 +02:00
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%pushi/vec4 0, 0, 1;
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2025-04-28 10:33:36 +02:00
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%assign/vec4 v000002bd53c54de0_0, 0;
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%pushi/vec4 0, 0, 1;
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%assign/vec4 v000002bd53c55240_0, 0;
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%load/vec4 v000002bd53c55060_0;
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2025-04-28 09:22:17 +02:00
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%flag_set/vec4 8;
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2025-04-28 10:33:36 +02:00
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%jmp/0xz T_2.10, 8;
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2025-04-28 09:22:17 +02:00
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%pushi/vec4 1, 0, 3;
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2025-04-28 10:33:36 +02:00
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%assign/vec4 v000002bd53cd1f40_0, 0;
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2025-04-28 09:22:17 +02:00
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%pushi/vec4 0, 0, 16;
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2025-04-28 10:33:36 +02:00
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%assign/vec4 v000002bd53cd2620_0, 0;
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T_2.10 ;
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%jmp T_2.9;
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T_2.1 ;
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2025-04-28 09:22:17 +02:00
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%pushi/vec4 1, 0, 1;
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2025-04-28 10:33:36 +02:00
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%assign/vec4 v000002bd53c54de0_0, 0;
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2025-04-28 09:22:17 +02:00
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%pushi/vec4 1, 0, 1;
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2025-04-28 10:33:36 +02:00
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%assign/vec4 v000002bd53c55240_0, 0;
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%load/vec4 v000002bd53cd2620_0;
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2025-04-28 09:22:17 +02:00
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%pad/u 32;
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%cmpi/u 270, 0, 32;
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2025-04-28 10:33:36 +02:00
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%jmp/0xz T_2.12, 5;
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%load/vec4 v000002bd53cd2620_0;
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2025-04-28 09:22:17 +02:00
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%addi 1, 0, 16;
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2025-04-28 10:33:36 +02:00
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%assign/vec4 v000002bd53cd2620_0, 0;
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%jmp T_2.13;
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T_2.12 ;
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2025-04-28 09:22:17 +02:00
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%pushi/vec4 0, 0, 16;
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2025-04-28 10:33:36 +02:00
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%assign/vec4 v000002bd53cd2620_0, 0;
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2025-04-28 09:22:17 +02:00
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%pushi/vec4 2, 0, 3;
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2025-04-28 10:33:36 +02:00
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%assign/vec4 v000002bd53cd1f40_0, 0;
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T_2.13 ;
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%jmp T_2.9;
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T_2.2 ;
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2025-04-28 09:22:17 +02:00
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%pushi/vec4 0, 0, 1;
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2025-04-28 10:33:36 +02:00
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%assign/vec4 v000002bd53c54de0_0, 0;
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2025-04-28 09:22:17 +02:00
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%pushi/vec4 0, 0, 1;
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2025-04-28 10:33:36 +02:00
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%assign/vec4 v000002bd53c55240_0, 0;
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%load/vec4 v000002bd53c54c00_0;
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%flag_set/vec4 8;
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%jmp/0xz T_2.14, 8;
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%pushi/vec4 2, 0, 3;
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%assign/vec4 v000002bd53cd1f40_0, 0;
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%jmp T_2.15;
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T_2.14 ;
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2025-04-28 09:22:17 +02:00
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%pushi/vec4 3, 0, 3;
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2025-04-28 10:33:36 +02:00
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%assign/vec4 v000002bd53cd1f40_0, 0;
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T_2.15 ;
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%jmp T_2.9;
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T_2.3 ;
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%load/vec4 v000002bd53c54c00_0;
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2025-04-28 09:22:17 +02:00
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%flag_set/vec4 8;
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2025-04-28 10:33:36 +02:00
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%jmp/0xz T_2.16, 8;
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2025-04-28 09:22:17 +02:00
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%pushi/vec4 0, 0, 32;
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2025-04-28 10:33:36 +02:00
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%assign/vec4 v000002bd53c54980_0, 0;
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2025-04-28 09:22:17 +02:00
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%pushi/vec4 4, 0, 3;
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2025-04-28 10:33:36 +02:00
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%assign/vec4 v000002bd53cd1f40_0, 0;
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%jmp T_2.17;
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T_2.16 ;
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%load/vec4 v000002bd53c54980_0;
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2025-04-28 09:22:17 +02:00
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%cmpi/u 4294965641, 0, 32;
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%flag_inv 5; GE is !LT
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2025-04-28 10:33:36 +02:00
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%jmp/0xz T_2.18, 5;
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2025-04-28 09:22:17 +02:00
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%pushi/vec4 0, 0, 16;
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2025-04-28 10:33:36 +02:00
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%assign/vec4 v000002bd53c55740_0, 0;
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%pushi/vec4 6, 0, 3;
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%assign/vec4 v000002bd53cd1f40_0, 0;
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%jmp T_2.19;
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T_2.18 ;
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%load/vec4 v000002bd53c54980_0;
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2025-04-28 09:22:17 +02:00
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%addi 1, 0, 32;
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2025-04-28 10:33:36 +02:00
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%assign/vec4 v000002bd53c54980_0, 0;
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T_2.19 ;
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T_2.17 ;
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%jmp T_2.9;
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T_2.4 ;
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%load/vec4 v000002bd53c54c00_0;
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2025-04-28 09:22:17 +02:00
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%flag_set/vec4 8;
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2025-04-28 10:33:36 +02:00
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%jmp/0xz T_2.20, 8;
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%load/vec4 v000002bd53c54980_0;
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2025-04-28 09:22:17 +02:00
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%cmpi/u 4294965641, 0, 32;
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2025-04-28 10:33:36 +02:00
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|
%jmp/0xz T_2.22, 5;
|
|
|
|
%load/vec4 v000002bd53c54980_0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%addi 1, 0, 32;
|
2025-04-28 10:33:36 +02:00
|
|
|
%assign/vec4 v000002bd53c54980_0, 0;
|
|
|
|
%jmp T_2.23;
|
|
|
|
T_2.22 ;
|
|
|
|
%pushi/vec4 6, 0, 3;
|
|
|
|
%assign/vec4 v000002bd53cd1f40_0, 0;
|
|
|
|
T_2.23 ;
|
|
|
|
%jmp T_2.21;
|
|
|
|
T_2.20 ;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 5, 0, 3;
|
2025-04-28 10:33:36 +02:00
|
|
|
%assign/vec4 v000002bd53cd1f40_0, 0;
|
|
|
|
T_2.21 ;
|
|
|
|
%jmp T_2.9;
|
|
|
|
T_2.5 ;
|
|
|
|
%load/vec4 v000002bd53c54980_0;
|
|
|
|
%cmpi/u 1566, 0, 32;
|
2025-04-28 09:22:17 +02:00
|
|
|
%flag_inv 5; GE is !LT
|
2025-04-28 10:33:36 +02:00
|
|
|
%jmp/0xz T_2.24, 5;
|
|
|
|
%load/vec4 v000002bd53c54980_0;
|
|
|
|
%subi 1566, 0, 32;
|
|
|
|
%assign/vec4 v000002bd53c54980_0, 0;
|
|
|
|
%load/vec4 v000002bd53c55880_0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%addi 1, 0, 16;
|
2025-04-28 10:33:36 +02:00
|
|
|
%assign/vec4 v000002bd53c55880_0, 0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 5, 0, 3;
|
2025-04-28 10:33:36 +02:00
|
|
|
%assign/vec4 v000002bd53cd1f40_0, 0;
|
|
|
|
%jmp T_2.25;
|
|
|
|
T_2.24 ;
|
|
|
|
%load/vec4 v000002bd53c55880_0;
|
|
|
|
%assign/vec4 v000002bd53c55740_0, 0;
|
|
|
|
%pushi/vec4 6, 0, 3;
|
|
|
|
%assign/vec4 v000002bd53cd1f40_0, 0;
|
|
|
|
T_2.25 ;
|
|
|
|
%jmp T_2.9;
|
|
|
|
T_2.6 ;
|
|
|
|
%load/vec4 v000002bd53c55060_0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%flag_set/vec4 8;
|
2025-04-28 10:33:36 +02:00
|
|
|
%jmp/0xz T_2.26, 8;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 32;
|
2025-04-28 10:33:36 +02:00
|
|
|
%assign/vec4 v000002bd53cd0dc0_0, 0;
|
|
|
|
%pushi/vec4 7, 0, 3;
|
|
|
|
%assign/vec4 v000002bd53cd1f40_0, 0;
|
|
|
|
%jmp T_2.27;
|
|
|
|
T_2.26 ;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 3;
|
2025-04-28 10:33:36 +02:00
|
|
|
%assign/vec4 v000002bd53cd1f40_0, 0;
|
|
|
|
T_2.27 ;
|
|
|
|
%jmp T_2.9;
|
|
|
|
T_2.7 ;
|
|
|
|
%load/vec4 v000002bd53cd0dc0_0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%addi 1, 0, 32;
|
2025-04-28 10:33:36 +02:00
|
|
|
%assign/vec4 v000002bd53cd0dc0_0, 0;
|
|
|
|
%load/vec4 v000002bd53cd0dc0_0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pad/u 64;
|
|
|
|
%cmpi/u 2700000, 0, 64;
|
|
|
|
%flag_inv 5; GE is !LT
|
2025-04-28 10:33:36 +02:00
|
|
|
%jmp/0xz T_2.28, 5;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 1, 0, 3;
|
2025-04-28 10:33:36 +02:00
|
|
|
%assign/vec4 v000002bd53cd1f40_0, 0;
|
|
|
|
%pushi/vec4 0, 0, 16;
|
|
|
|
%assign/vec4 v000002bd53cd2620_0, 0;
|
|
|
|
T_2.28 ;
|
|
|
|
%jmp T_2.9;
|
|
|
|
T_2.9 ;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pop/vec4 1;
|
2025-04-28 10:33:36 +02:00
|
|
|
%jmp T_2;
|
|
|
|
.thread T_2;
|
|
|
|
.scope S_000002bd53c55ce0;
|
|
|
|
T_3 ;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 3;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53c54a20_0, 0, 3;
|
|
|
|
%pushi/vec4 0, 0, 16;
|
|
|
|
%store/vec4 v000002bd53c552e0_0, 0, 16;
|
|
|
|
%pushi/vec4 0, 0, 32;
|
|
|
|
%store/vec4 v000002bd53c557e0_0, 0, 32;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 1;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53c556a0_0, 0, 1;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 1;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53c54f20_0, 0, 1;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 1;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53c55420_0, 0, 1;
|
2025-04-28 09:22:17 +02:00
|
|
|
%end;
|
2025-04-28 10:33:36 +02:00
|
|
|
.thread T_3;
|
|
|
|
.scope S_000002bd53c55ce0;
|
|
|
|
T_4 ;
|
|
|
|
%wait E_000002bd53c4ead0;
|
|
|
|
%load/vec4 v000002bd53c54a20_0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%dup/vec4;
|
|
|
|
%pushi/vec4 0, 0, 3;
|
|
|
|
%cmp/u;
|
2025-04-28 10:33:36 +02:00
|
|
|
%jmp/1 T_4.0, 6;
|
2025-04-28 09:22:17 +02:00
|
|
|
%dup/vec4;
|
|
|
|
%pushi/vec4 1, 0, 3;
|
|
|
|
%cmp/u;
|
2025-04-28 10:33:36 +02:00
|
|
|
%jmp/1 T_4.1, 6;
|
2025-04-28 09:22:17 +02:00
|
|
|
%dup/vec4;
|
|
|
|
%pushi/vec4 2, 0, 3;
|
|
|
|
%cmp/u;
|
2025-04-28 10:33:36 +02:00
|
|
|
%jmp/1 T_4.2, 6;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 1;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53c54d40_0, 0, 1;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 3;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53c54e80_0, 0, 3;
|
|
|
|
%jmp T_4.4;
|
|
|
|
T_4.0 ;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 1;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53c54d40_0, 0, 1;
|
|
|
|
%load/vec4 v000002bd53c55600_0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pad/u 32;
|
|
|
|
%cmpi/e 1, 0, 32;
|
2025-04-28 10:33:36 +02:00
|
|
|
%jmp/0xz T_4.5, 4;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 1, 0, 3;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53c54e80_0, 0, 3;
|
|
|
|
%jmp T_4.6;
|
|
|
|
T_4.5 ;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 3;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53c54e80_0, 0, 3;
|
|
|
|
T_4.6 ;
|
|
|
|
%jmp T_4.4;
|
|
|
|
T_4.1 ;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 1;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53c54d40_0, 0, 1;
|
|
|
|
%load/vec4 v000002bd53c556a0_0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%flag_set/vec4 8;
|
2025-04-28 10:33:36 +02:00
|
|
|
%jmp/0xz T_4.7, 8;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 2, 0, 3;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53c54e80_0, 0, 3;
|
|
|
|
T_4.7 ;
|
|
|
|
%jmp T_4.4;
|
|
|
|
T_4.2 ;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 1, 0, 1;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53c54d40_0, 0, 1;
|
|
|
|
%load/vec4 v000002bd53c54f20_0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%flag_set/vec4 8;
|
2025-04-28 10:33:36 +02:00
|
|
|
%jmp/0xz T_4.9, 8;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 1;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53c54f20_0, 0, 1;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 3;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53c54e80_0, 0, 3;
|
|
|
|
%jmp T_4.10;
|
|
|
|
T_4.9 ;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 2, 0, 3;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53c54e80_0, 0, 3;
|
|
|
|
T_4.10 ;
|
|
|
|
%jmp T_4.4;
|
|
|
|
T_4.4 ;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pop/vec4 1;
|
|
|
|
%jmp T_4;
|
2025-04-28 10:33:36 +02:00
|
|
|
.thread T_4, $push;
|
|
|
|
.scope S_000002bd53c55ce0;
|
2025-04-28 09:22:17 +02:00
|
|
|
T_5 ;
|
2025-04-28 10:33:36 +02:00
|
|
|
%wait E_000002bd53c4e950;
|
|
|
|
%load/vec4 v000002bd53c54e80_0;
|
|
|
|
%assign/vec4 v000002bd53c54a20_0, 0;
|
|
|
|
%jmp T_5;
|
|
|
|
.thread T_5;
|
|
|
|
.scope S_000002bd53c55ce0;
|
|
|
|
T_6 ;
|
|
|
|
%wait E_000002bd53c4e950;
|
|
|
|
%load/vec4 v000002bd53c54a20_0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%cmpi/e 1, 0, 3;
|
2025-04-28 10:33:36 +02:00
|
|
|
%jmp/0xz T_6.0, 4;
|
|
|
|
%load/vec4 v000002bd53c55600_0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pad/u 32;
|
|
|
|
%cmpi/e 1, 0, 32;
|
2025-04-28 10:33:36 +02:00
|
|
|
%jmp/0xz T_6.2, 4;
|
|
|
|
%load/vec4 v000002bd53c552e0_0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%addi 1, 0, 16;
|
2025-04-28 10:33:36 +02:00
|
|
|
%assign/vec4 v000002bd53c552e0_0, 0;
|
|
|
|
%jmp T_6.3;
|
|
|
|
T_6.2 ;
|
|
|
|
%load/vec4 v000002bd53c552e0_0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pad/u 32;
|
2025-04-28 10:33:36 +02:00
|
|
|
%cmpi/u 250, 0, 32;
|
2025-04-28 09:22:17 +02:00
|
|
|
%flag_inv 5; GE is !LT
|
2025-04-28 10:33:36 +02:00
|
|
|
%jmp/0xz T_6.4, 5;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 1, 0, 1;
|
2025-04-28 10:33:36 +02:00
|
|
|
%assign/vec4 v000002bd53c556a0_0, 0;
|
|
|
|
%jmp T_6.5;
|
|
|
|
T_6.4 ;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 1;
|
2025-04-28 10:33:36 +02:00
|
|
|
%assign/vec4 v000002bd53c556a0_0, 0;
|
|
|
|
T_6.5 ;
|
|
|
|
T_6.3 ;
|
|
|
|
T_6.0 ;
|
|
|
|
%jmp T_6;
|
|
|
|
.thread T_6;
|
|
|
|
.scope S_000002bd53c55ce0;
|
|
|
|
T_7 ;
|
|
|
|
%wait E_000002bd53c4e950;
|
|
|
|
%load/vec4 v000002bd53c54a20_0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%cmpi/e 2, 0, 3;
|
2025-04-28 10:33:36 +02:00
|
|
|
%jmp/0xz T_7.0, 4;
|
|
|
|
%load/vec4 v000002bd53c55380_0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pad/u 32;
|
|
|
|
%cmpi/e 5800, 0, 32;
|
2025-04-28 10:33:36 +02:00
|
|
|
%jmp/0xz T_7.2, 4;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 1;
|
2025-04-28 10:33:36 +02:00
|
|
|
%assign/vec4 v000002bd53c55420_0, 0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 1, 0, 1;
|
2025-04-28 10:33:36 +02:00
|
|
|
%assign/vec4 v000002bd53c54f20_0, 0;
|
|
|
|
%jmp T_7.3;
|
|
|
|
T_7.2 ;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 1, 0, 1;
|
2025-04-28 10:33:36 +02:00
|
|
|
%assign/vec4 v000002bd53c55420_0, 0;
|
|
|
|
%load/vec4 v000002bd53c55380_0;
|
2025-04-28 09:22:17 +02:00
|
|
|
%addi 1, 0, 16;
|
2025-04-28 10:33:36 +02:00
|
|
|
%assign/vec4 v000002bd53c55380_0, 0;
|
|
|
|
T_7.3 ;
|
|
|
|
%jmp T_7.1;
|
|
|
|
T_7.0 ;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 16;
|
2025-04-28 10:33:36 +02:00
|
|
|
%assign/vec4 v000002bd53c55380_0, 0;
|
|
|
|
T_7.1 ;
|
|
|
|
%jmp T_7;
|
|
|
|
.thread T_7;
|
|
|
|
.scope S_000002bd53c55940;
|
|
|
|
T_8 ;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 1;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53cd08c0_0, 0, 1;
|
2025-04-28 09:22:17 +02:00
|
|
|
%pushi/vec4 0, 0, 1;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53cd1cc0_0, 0, 1;
|
2025-04-28 09:22:17 +02:00
|
|
|
%end;
|
|
|
|
.thread T_8;
|
2025-04-28 10:33:36 +02:00
|
|
|
.scope S_000002bd53c55940;
|
2025-04-28 09:22:17 +02:00
|
|
|
T_9 ;
|
2025-04-28 10:33:36 +02:00
|
|
|
%delay 18000, 0;
|
|
|
|
%load/vec4 v000002bd53cd08c0_0;
|
|
|
|
%inv;
|
|
|
|
%store/vec4 v000002bd53cd08c0_0, 0, 1;
|
|
|
|
%jmp T_9;
|
|
|
|
.thread T_9;
|
|
|
|
.scope S_000002bd53c55940;
|
|
|
|
T_10 ;
|
2025-04-28 09:22:17 +02:00
|
|
|
%vpi_call 2 28 "$dumpfile", "ultrasonic.vcd" {0 0 0};
|
2025-04-28 10:33:36 +02:00
|
|
|
%vpi_call 2 29 "$dumpvars", 32'sb00000000000000000000000000000000, S_000002bd53c55940 {0 0 0};
|
2025-04-28 09:22:17 +02:00
|
|
|
%delay 100000, 0;
|
|
|
|
%pushi/vec4 1, 0, 1;
|
2025-04-28 10:33:36 +02:00
|
|
|
%store/vec4 v000002bd53cd1cc0_0, 0, 1;
|
2025-04-28 09:22:17 +02:00
|
|
|
%delay 40000, 0;
|
|
|
|
%pushi/vec4 0, 0, 1;
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2025-04-28 10:33:36 +02:00
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%store/vec4 v000002bd53cd1cc0_0, 0, 1;
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2025-04-28 09:22:17 +02:00
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%delay 600000000, 0;
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2025-04-28 10:33:36 +02:00
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%vpi_call 2 40 "$display", "Distance mesur\303\251e: %d cm", v000002bd53cd10e0_0 {0 0 0};
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%load/vec4 v000002bd53cd10e0_0;
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2025-04-28 09:22:17 +02:00
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%pad/u 32;
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|
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|
%cmpi/u 0, 0, 32;
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|
%flag_or 5, 4; GT is !LE
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|
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%flag_inv 5;
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2025-04-28 10:33:36 +02:00
|
|
|
%jmp/0xz T_10.0, 5;
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|
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|
%vpi_call 2 45 "$display", "Distance measured: %d cm", v000002bd53cd10e0_0 {0 0 0};
|
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|
|
%jmp T_10.1;
|
|
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|
T_10.0 ;
|
2025-04-28 09:22:17 +02:00
|
|
|
%vpi_call 2 47 "$display", "No distance measured." {0 0 0};
|
2025-04-28 10:33:36 +02:00
|
|
|
T_10.1 ;
|
2025-04-28 09:22:17 +02:00
|
|
|
%vpi_call 2 50 "$finish" {0 0 0};
|
|
|
|
%end;
|
2025-04-28 10:33:36 +02:00
|
|
|
.thread T_10;
|
2025-04-28 09:22:17 +02:00
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|
|
# The file index is used to find the file name in the following table.
|
|
|
|
:file_names 5;
|
|
|
|
"N/A";
|
|
|
|
"<interactive>";
|
|
|
|
"tb_ultrasonic_fpga.v";
|
|
|
|
"ultrasonic_sensor.v";
|
|
|
|
"ultrasonic_fpga.v";
|