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forked from tanchou/Verilog
Commit Graph

14 Commits

Author SHA1 Message Date
Gamenight77
505f71974e New Week 2025-04-28 09:22:17 +02:00
Gamenight77
a976fcb266 Implement code changes to enhance functionality and improve performance 2025-04-25 18:09:55 +02:00
Gamenight77
8c00b9d747 New TB for ultrasonic but not working fine 2025-04-25 10:51:44 +02:00
Gamenight77
c6d33d278e Implement distance measurement and display modules: add ultrasonic sensor, FPGA logic, LED display, and WS2812 driver for enhanced distance visualization 2025-04-25 10:21:18 +02:00
Gamenight77
d8708d1bd5 Refactor ultrasonic FPGA module: replace sig_in with sig_ok for improved signal handling and update ESP32 command processing to support new client list command 2025-04-25 09:17:22 +02:00
Gamenight77
f2bcd7bc24 Refactor ESP32 communication: update packet structure, enhance frame reading, and implement command interpretation 2025-04-24 10:43:25 +02:00
Gamenight77
0eeecbca2e Enhance ESP32 command processing: add validation, error handling, and new command types for device management 2025-04-23 15:52:36 +02:00
Gamenight77
2b7582808e Update serial communication code: change COM port in read_rx.py and add ESP32 command interpretation in esp32_read.py 2025-04-23 11:50:26 +02:00
Gamenight77
bd49b7949e Add WiFi access point functionality and client management to ESP32 code 2025-04-23 10:22:02 +02:00
Gamenight77
527b6585ff Add documentation section for ESP32 in README 2025-04-22 16:51:05 +02:00
Gamenight77
73cc201b6d Add README and project documentation for FPGA and ESP32 integration 2025-04-22 16:46:03 +02:00
Gamenight77
11b14ced36 Update Projet_esp32.txt: add architecture diagram and detailed descriptions for UART modules 2025-04-22 16:38:00 +02:00
Gamenight77
574ace75ef Readme 2025-04-22 14:32:34 +02:00
Gamenight77
3bb56e2f57 Init et début de réflexion sur le projet 2025-04-22 09:56:06 +02:00