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forked from tanchou/Verilog

Refactor distance data type from 15 bits to 9 bits in ultrasonic_fpga module and update related testbench for consistency

This commit is contained in:
Gamenight77
2025-04-16 14:03:48 +02:00
parent a00122b595
commit 079159bdb8
6 changed files with 392 additions and 2 deletions

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@@ -0,0 +1,29 @@
module distance_display_led (
input wire [8:0] distance,
output reg [5:0] leds
);
// Constante
parameter MIN_DIST = 2;
parameter MAX_DIST = 349;
parameter LEVELS = 5;
parameter PART_SIZE = (MAX_DIST - MIN_DIST + 1) / LEVELS;
always @(*) begin
if (distance <= MIN_DIST + PART_SIZE*0)
leds = 6'b111111;
else if (distance <= MIN_DIST + PART_SIZE*1)
leds = 6'b111110;
else if (distance <= MIN_DIST + PART_SIZE*2)
leds = 6'b111100;
else if (distance <= MIN_DIST + PART_SIZE*3)
leds = 6'b111000;
else if (distance <= MIN_DIST + PART_SIZE*4)
leds = 6'b110000;
else if (distance <= MIN_DIST + PART_SIZE*5)
leds = 6'b100000;
else
leds = 6'b000000;
end
endmodule

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@@ -0,0 +1,212 @@
$date
Wed Apr 16 14:03:22 2025
$end
$version
Icarus Verilog
$end
$timescale
1s
$end
$scope module tb_distance_display_led $end
$var wire 6 ! leds [5:0] $end
$var reg 9 " distance [8:0] $end
$var integer 32 # i [31:0] $end
$scope module uut $end
$var wire 9 $ distance [8:0] $end
$var parameter 32 % LEVELS $end
$var parameter 32 & MAX_DIST $end
$var parameter 32 ' MIN_DIST $end
$var parameter 34 ( PART_SIZE $end
$var reg 6 ) leds [5:0] $end
$upscope $end
$upscope $end
$enddefinitions $end
$comment Show the parameter values. $end
$dumpall
b1000101 (
b10 '
b101011101 &
b101 %
$end
#0
$dumpvars
b111111 )
b0 $
b0 #
b0 "
b111111 !
$end
#10
b111110 !
b111110 )
b1010 "
b1010 $
b1010 #
#20
b10100 "
b10100 $
b10100 #
#30
b11110 "
b11110 $
b11110 #
#40
b101000 "
b101000 $
b101000 #
#50
b110010 "
b110010 $
b110010 #
#60
b111100 "
b111100 $
b111100 #
#70
b1000110 "
b1000110 $
b1000110 #
#80
b111100 !
b111100 )
b1010000 "
b1010000 $
b1010000 #
#90
b1011010 "
b1011010 $
b1011010 #
#100
b1100100 "
b1100100 $
b1100100 #
#110
b1101110 "
b1101110 $
b1101110 #
#120
b1111000 "
b1111000 $
b1111000 #
#130
b10000010 "
b10000010 $
b10000010 #
#140
b10001100 "
b10001100 $
b10001100 #
#150
b111000 !
b111000 )
b10010110 "
b10010110 $
b10010110 #
#160
b10100000 "
b10100000 $
b10100000 #
#170
b10101010 "
b10101010 $
b10101010 #
#180
b10110100 "
b10110100 $
b10110100 #
#190
b10111110 "
b10111110 $
b10111110 #
#200
b11001000 "
b11001000 $
b11001000 #
#210
b110000 !
b110000 )
b11010010 "
b11010010 $
b11010010 #
#220
b11011100 "
b11011100 $
b11011100 #
#230
b11100110 "
b11100110 $
b11100110 #
#240
b11110000 "
b11110000 $
b11110000 #
#250
b11111010 "
b11111010 $
b11111010 #
#260
b100000100 "
b100000100 $
b100000100 #
#270
b100001110 "
b100001110 $
b100001110 #
#280
b100000 !
b100000 )
b100011000 "
b100011000 $
b100011000 #
#290
b100100010 "
b100100010 $
b100100010 #
#300
b100101100 "
b100101100 $
b100101100 #
#310
b100110110 "
b100110110 $
b100110110 #
#320
b101000000 "
b101000000 $
b101000000 #
#330
b101001010 "
b101001010 $
b101001010 #
#340
b101010100 "
b101010100 $
b101010100 #
#350
b0 !
b0 )
b101011110 "
b101011110 $
b101011110 #
#360
b101101000 "
b101101000 $
b101101000 #
#370
b101110010 "
b101110010 $
b101110010 #
#380
b101111100 "
b101111100 $
b101111100 #
#390
b110000110 "
b110000110 $
b110000110 #
#400
b110010000 "
b110010000 $
b110010000 #
#410
b110011010 #

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@@ -0,0 +1,123 @@
#!
:ivl_version "13.0 (devel)" "(s20250103-31-g7e238e7ca-dirty)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0;
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\system.vpi";
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_sys.vpi";
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_textio.vpi";
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\v2005_math.vpi";
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\va_math.vpi";
S_000001b2514bb620 .scope module, "tb_distance_display_led" "tb_distance_display_led" 2 1;
.timescale 0 0;
v000001b2514bbe50_0 .var "distance", 8 0;
v000001b2514bbef0_0 .var/i "i", 31 0;
v000001b2515d8150_0 .net "leds", 5 0, v000001b2514be0e0_0; 1 drivers
S_000001b2514bbb30 .scope module, "uut" "distance_display_led" 2 5, 3 1 0, S_000001b2514bb620;
.timescale 0 0;
.port_info 0 /INPUT 9 "distance";
.port_info 1 /OUTPUT 6 "leds";
P_000001b2514bbcc0 .param/l "LEVELS" 0 3 9, +C4<00000000000000000000000000000101>;
P_000001b2514bbcf8 .param/l "MAX_DIST" 0 3 8, +C4<00000000000000000000000101011101>;
P_000001b2514bbd30 .param/l "MIN_DIST" 0 3 7, +C4<00000000000000000000000000000010>;
P_000001b2514bbd68 .param/l "PART_SIZE" 0 3 10, +C4<0000000000000000000000000001000101>;
v000001b2514bbdb0_0 .net "distance", 8 0, v000001b2514bbe50_0; 1 drivers
v000001b2514be0e0_0 .var "leds", 5 0;
E_000001b2515c8c00 .event anyedge, v000001b2514bbdb0_0;
.scope S_000001b2514bbb30;
T_0 ;
%wait E_000001b2515c8c00;
%load/vec4 v000001b2514bbdb0_0;
%pad/u 34;
%cmpi/u 2, 0, 34;
%flag_or 5, 4;
%jmp/0xz T_0.0, 5;
%pushi/vec4 63, 0, 6;
%store/vec4 v000001b2514be0e0_0, 0, 6;
%jmp T_0.1;
T_0.0 ;
%load/vec4 v000001b2514bbdb0_0;
%pad/u 34;
%cmpi/u 71, 0, 34;
%flag_or 5, 4;
%jmp/0xz T_0.2, 5;
%pushi/vec4 62, 0, 6;
%store/vec4 v000001b2514be0e0_0, 0, 6;
%jmp T_0.3;
T_0.2 ;
%load/vec4 v000001b2514bbdb0_0;
%pad/u 34;
%cmpi/u 140, 0, 34;
%flag_or 5, 4;
%jmp/0xz T_0.4, 5;
%pushi/vec4 60, 0, 6;
%store/vec4 v000001b2514be0e0_0, 0, 6;
%jmp T_0.5;
T_0.4 ;
%load/vec4 v000001b2514bbdb0_0;
%pad/u 34;
%cmpi/u 209, 0, 34;
%flag_or 5, 4;
%jmp/0xz T_0.6, 5;
%pushi/vec4 56, 0, 6;
%store/vec4 v000001b2514be0e0_0, 0, 6;
%jmp T_0.7;
T_0.6 ;
%load/vec4 v000001b2514bbdb0_0;
%pad/u 34;
%cmpi/u 278, 0, 34;
%flag_or 5, 4;
%jmp/0xz T_0.8, 5;
%pushi/vec4 48, 0, 6;
%store/vec4 v000001b2514be0e0_0, 0, 6;
%jmp T_0.9;
T_0.8 ;
%load/vec4 v000001b2514bbdb0_0;
%pad/u 34;
%cmpi/u 347, 0, 34;
%flag_or 5, 4;
%jmp/0xz T_0.10, 5;
%pushi/vec4 32, 0, 6;
%store/vec4 v000001b2514be0e0_0, 0, 6;
%jmp T_0.11;
T_0.10 ;
%pushi/vec4 0, 0, 6;
%store/vec4 v000001b2514be0e0_0, 0, 6;
T_0.11 ;
T_0.9 ;
T_0.7 ;
T_0.5 ;
T_0.3 ;
T_0.1 ;
%jmp T_0;
.thread T_0, $push;
.scope S_000001b2514bb620;
T_1 ;
%vpi_call 2 13 "$dumpfile", "distance_display_led.vcd" {0 0 0};
%vpi_call 2 14 "$dumpvars", 32'sb00000000000000000000000000000000, S_000001b2514bb620 {0 0 0};
%pushi/vec4 0, 0, 32;
%store/vec4 v000001b2514bbef0_0, 0, 32;
T_1.0 ; Top of for-loop
%load/vec4 v000001b2514bbef0_0;
%cmpi/s 400, 0, 32;
%flag_or 5, 4;
%jmp/0xz T_1.1, 5;
%load/vec4 v000001b2514bbef0_0;
%pad/s 9;
%store/vec4 v000001b2514bbe50_0, 0, 9;
%delay 10, 0;
%vpi_call 2 20 "$display", "Distance: %3d cm => LEDs: %b", v000001b2514bbe50_0, v000001b2515d8150_0 {0 0 0};
T_1.2 ; for-loop step statement
%load/vec4 v000001b2514bbef0_0;
%addi 10, 0, 32;
%store/vec4 v000001b2514bbef0_0, 0, 32;
%jmp T_1.0;
T_1.1 ; for-loop exit label
%vpi_call 2 23 "$finish" {0 0 0};
%end;
.thread T_1;
# The file index is used to find the file name in the following table.
:file_names 4;
"N/A";
"<interactive>";
"tb_distance_display_led.v";
"distance_display_led.v";

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@@ -0,0 +1,26 @@
module tb_distance_display_led;
reg [8:0] distance;
wire [5:0] leds;
distance_display_led uut (
.distance(distance),
.leds(leds)
);
integer i;
initial begin
$dumpfile("distance_display_led.vcd");
$dumpvars(0, tb_distance_display_led);
// Test de la conversion de distance en LED
for (i = 0; i <= 380; i = i + 10) begin
distance = i;
#10;
$display("Distance: %3d cm => LEDs: %b", distance, leds);
end
$finish;
end
endmodule

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@@ -7,7 +7,7 @@ module tb_ultrasonic_fpga;
reg start = 0;
reg echo = 0;
wire trig_out;
wire [15:0] distance;
wire [8:0] distance;
time t_start, t_end;

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@@ -6,7 +6,7 @@ module ultrasonic_fpga #(
input wire start, // signal de declenchement
input wire echo, // retour du capteur
output reg trig_out, // signal envoye au capteur
output reg [15:0] distance // distance mesuree
output reg [8:0] distance // distance mesuree
);
reg [2:0] state;