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forked from tanchou/Verilog

Refactor distance data type from 15 bits to 9 bits in ultrasonic_fpga module and update related testbench for consistency

This commit is contained in:
Gamenight77
2025-04-16 14:03:48 +02:00
parent a00122b595
commit 079159bdb8
6 changed files with 392 additions and 2 deletions

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@@ -6,7 +6,7 @@ module ultrasonic_fpga #(
input wire start, // signal de declenchement
input wire echo, // retour du capteur
output reg trig_out, // signal envoye au capteur
output reg [15:0] distance // distance mesuree
output reg [8:0] distance // distance mesuree
);
reg [2:0] state;