verlan/Verilog_Louis
1
0
Fork 0
forked from tanchou/Verilog
Code Pull Requests Activity

Add LED indication for RX signal in top_uart_loopback module

Browse Source
This commit is contained in:
Gamenight77
2025-05-05 14:54:40 +02:00
parent 589c36ed83
commit e0a54fb42a
1 changed files with 1 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
Semaine_4/UART/src/verilog/top_uart_loopback.v
View File

@@ -41,6 +41,7 @@ module top_uart_loopback (
reg state = IDLE; reg state = IDLE;
always @(posedge clk) begin always @(posedge clk) begin
leds[5] <= rx;
case (state) case (state)
IDLE: begin IDLE: begin
tx_enable <= 0; tx_enable <= 0;