- Implemented rx_fifo module for receiving data with FIFO management.
- Created tb_top_uart_rx_tx testbench for testing UART transmission and reception.
- Developed tb_uart_rx testbench for validating UART receiver functionality.
- Added tb_uart_tx testbench for testing UART transmitter behavior.
- Designed top_led_uart module to interface UART with LED outputs.
- Integrated top_uart_ultrasonic module for ultrasonic sensor data transmission via UART.
- Implemented tx_fifo module for transmitting data with FIFO management.
- Developed uart_rx module for receiving serial data with state machine control.
- Created uart_top module to connect RX and TX functionalities with FIFO buffers.
- Implemented uart_tx module for transmitting serial data with state machine control.
- Initialized registers in ultrasonic_fpga to avoid undefined behavior.
- Modified state machine in ultrasonic_fpga to include a COMPUTE state for better echo measurement handling.
- Adjusted echo counting logic to ensure accurate distance calculation.
- Updated ultrasonic_sensor to allow for a more flexible trigger pulse timing by reducing the threshold for valid triggers.
