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Add testbench for top_ultrasonic_led module

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- Created a new testbench file `top_ultrasonic_led_tb.vvp` to simulate the `top_ultrasonic_led` module.
- Defined the necessary signals and events for testing the ultrasonic sensor functionality.
- Implemented the main test sequence including triggering the ultrasonic sensor and monitoring the output LEDs based on distance measurements.
- Included timing and state management for accurate simulation of the ultrasonic sensor behavior.
This commit is contained in:
Gamenight77
2025-04-16 14:23:18 +02:00
parent 079159bdb8
commit 7a2fbc0195
12 changed files with 8335 additions and 0 deletions
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Semaine 1/Distance_display_led/distance_display_led.v → Semaine 1/Capteur_recule/Distance_display_led/distance_display_led.v
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Semaine 1/Distance_display_led/distance_display_led.vcd → Semaine 1/Capteur_recule/Distance_display_led/distance_display_led.vcd
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Semaine 1/Distance_display_led/distance_display_led_sim → Semaine 1/Capteur_recule/Distance_display_led/distance_display_led_sim
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Semaine 1/Distance_display_led/tb_distance_display_led.v → Semaine 1/Capteur_recule/Distance_display_led/tb_distance_display_led.v
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Semaine 1/Ultrasonic/tb_ultrasonic_fpga.v → Semaine 1/Capteur_recule/Ultrasonic/tb_ultrasonic_fpga.v
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Semaine 1/Ultrasonic/ultrasonic.vcd → Semaine 1/Capteur_recule/Ultrasonic/ultrasonic.vcd
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Semaine 1/Ultrasonic/ultrasonic_fpga.v → Semaine 1/Capteur_recule/Ultrasonic/ultrasonic_fpga.v
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Semaine 1/Ultrasonic/ultrasonic_sim → Semaine 1/Capteur_recule/Ultrasonic/ultrasonic_sim
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Semaine 1/Capteur_recule/tb_top_ultrasonic_led.v Normal file
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`timescale 1ns/1ps
module tb_top_ultrasonic_led;
reg clk;
reg rst;
reg start;
reg echo;
wire trig;
wire [5:0] leds;
// Instance du module top
top_ultrasonic_led uut (
.clk(clk),
.rst(rst),
.start(start),
.echo(echo),
.trig(trig),
.leds(leds)
);
always #18.5 clk = ~clk;
initial begin
// Initialisation
$dumpfile("top_ultrasonic_led.vcd");
$dumpvars(0, tb_top_ultrasonic_led);
clk = 0;
rst = 1;
start = 0;
echo = 0;
#100;
rst = 0;
#50;
start = 1;
#20;
start = 0;
// Attente du signal trig
wait (trig == 1);
$display("TRIG HIGH at %t", $time);
wait (trig == 0);
$display("TRIG LOW at %t", $time);
repeat (500) @(posedge clk);
echo = 1;
#12000
echo = 0;
repeat (500) @(posedge clk);
$display("Leds allumer : %b", leds);
$finish;
end
endmodule

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Semaine 1/Capteur_recule/top_ultrasonic_led.v Normal file
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module top_ultrasonic_led (
input wire clk,
input wire rst,
input wire start, // bouton ou signal de départ
input wire echo, // signal du capteur
output wire trig, // vers le capteur
output wire [5:0] leds // sorties LED
);
wire [8:0] distance;
// Module de mesure de distance
ultrasonic_fpga ultrasonic_inst (
.clk(clk),
.rst(rst),
.start(start),
.echo(echo),
.trig_out(trig),
.distance(distance)
);
// Module d'affichage leds
distance_display_led led_display_inst (
.distance(distance),
.leds(leds)
);
endmodule

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Semaine 1/Capteur_recule/top_ultrasonic_led.vcd Normal file
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#!
:ivl_version "13.0 (devel)" "(s20250103-31-g7e238e7ca-dirty)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision - 12;
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\system.vpi";
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_sys.vpi";
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\vhdl_textio.vpi";
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\v2005_math.vpi";
:vpi_module "C:\Users\louis\BUT2\Verilog\OSS-CA~1\lib\ivl\va_math.vpi";
S_0000016babb102e0 .scope module, "tb_top_ultrasonic_led" "tb_top_ultrasonic_led" 2 3;
.timescale -9 -12;
v0000016babb7abc0_0 .var "clk", 0 0;
v0000016babb7ada0_0 .var "echo", 0 0;
v0000016babb7a580_0 .net "leds", 5 0, v0000016babb0e8e0_0; 1 drivers
v0000016babb7a260_0 .var "rst", 0 0;
v0000016babb7a620_0 .var "start", 0 0;
v0000016babb7a760_0 .net "trig", 0 0, v0000016babb7a120_0; 1 drivers
E_0000016babb0c2a0 .event posedge, v0000016babb7a4e0_0;
E_0000016babb0c320 .event anyedge, v0000016babb7a120_0;
S_0000016babae6610 .scope module, "uut" "top_ultrasonic_led" 2 13, 3 1 0, S_0000016babb102e0;
.timescale 0 0;
.port_info 0 /INPUT 1 "clk";
.port_info 1 /INPUT 1 "rst";
.port_info 2 /INPUT 1 "start";
.port_info 3 /INPUT 1 "echo";
.port_info 4 /OUTPUT 1 "trig";
.port_info 5 /OUTPUT 6 "leds";
v0000016babb7ab20_0 .net "clk", 0 0, v0000016babb7abc0_0; 1 drivers
v0000016babb7af80_0 .net "distance", 8 0, v0000016babb7a440_0; 1 drivers
v0000016babb7a6c0_0 .net "echo", 0 0, v0000016babb7ada0_0; 1 drivers
v0000016babb7a800_0 .net "leds", 5 0, v0000016babb0e8e0_0; alias, 1 drivers
v0000016babb7ac60_0 .net "rst", 0 0, v0000016babb7a260_0; 1 drivers
v0000016babb7a9e0_0 .net "start", 0 0, v0000016babb7a620_0; 1 drivers
v0000016babb7aa80_0 .net "trig", 0 0, v0000016babb7a120_0; alias, 1 drivers
S_0000016babae67a0 .scope module, "led_display_inst" "distance_display_led" 3 23, 4 1 0, S_0000016babae6610;
.timescale 0 0;
.port_info 0 /INPUT 9 "distance";
.port_info 1 /OUTPUT 6 "leds";
P_0000016babae6930 .param/l "LEVELS" 0 4 9, +C4<00000000000000000000000000000101>;
P_0000016babae6968 .param/l "MAX_DIST" 0 4 8, +C4<00000000000000000000000101011101>;
P_0000016babae69a0 .param/l "MIN_DIST" 0 4 7, +C4<00000000000000000000000000000010>;
P_0000016babae69d8 .param/l "PART_SIZE" 0 4 10, +C4<0000000000000000000000000001000101>;
v0000016babb0e7a0_0 .net "distance", 8 0, v0000016babb7a440_0; alias, 1 drivers
v0000016babb0e8e0_0 .var "leds", 5 0;
E_0000016babb1a860 .event anyedge, v0000016babb0e7a0_0;
S_0000016babb23200 .scope module, "ultrasonic_inst" "ultrasonic_fpga" 3 13, 5 1 0, S_0000016babae6610;
.timescale 0 0;
.port_info 0 /INPUT 1 "clk";
.port_info 1 /INPUT 1 "rst";
.port_info 2 /INPUT 1 "start";
.port_info 3 /INPUT 1 "echo";
.port_info 4 /OUTPUT 1 "trig_out";
.port_info 5 /OUTPUT 9 "distance";
P_0000016babb23390 .param/l "CLK_FREQ" 0 5 2, +C4<00000001100110111111110011000000>;
P_0000016babb233c8 .param/l "DIST_DIVISOR" 1 5 20, +C4<00000000000000000000011000011110>;
P_0000016babb23400 .param/l "DONE" 1 5 16, +C4<00000000000000000000000000000100>;
P_0000016babb23438 .param/l "IDLE" 1 5 16, +C4<00000000000000000000000000000000>;
P_0000016babb23470 .param/l "MEASURE_ECHO" 1 5 16, +C4<00000000000000000000000000000011>;
P_0000016babb234a8 .param/l "TRIG" 1 5 16, +C4<00000000000000000000000000000001>;
P_0000016babb234e0 .param/l "TRIG_DURATION_CYCLES" 1 5 19, +C4<00000000000000000000000100001110>;
P_0000016babb23518 .param/l "WAIT_ECHO" 1 5 16, +C4<00000000000000000000000000000010>;
v0000016babb7a4e0_0 .net "clk", 0 0, v0000016babb7abc0_0; alias, 1 drivers
v0000016babb7a440_0 .var "distance", 8 0;
v0000016babb7a080_0 .net "echo", 0 0, v0000016babb7ada0_0; alias, 1 drivers
v0000016babb7aee0_0 .var "echo_counter", 15 0;
v0000016babb7a940_0 .net "rst", 0 0, v0000016babb7a260_0; alias, 1 drivers
v0000016babb7a8a0_0 .net "start", 0 0, v0000016babb7a620_0; alias, 1 drivers
v0000016babb7a1c0_0 .var "state", 2 0;
v0000016babb7a3a0_0 .var "trig_counter", 8 0;
v0000016babb7a120_0 .var "trig_out", 0 0;
E_0000016babb1a8e0 .event posedge, v0000016babb7a940_0, v0000016babb7a4e0_0;
.scope S_0000016babb23200;
T_0 ;
%wait E_0000016babb1a8e0;
%load/vec4 v0000016babb7a940_0;
%flag_set/vec4 8;
%jmp/0xz T_0.0, 8;
%pushi/vec4 0, 0, 3;
%assign/vec4 v0000016babb7a1c0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0000016babb7a120_0, 0;
%pushi/vec4 0, 0, 9;
%assign/vec4 v0000016babb7a3a0_0, 0;
%pushi/vec4 0, 0, 16;
%assign/vec4 v0000016babb7aee0_0, 0;
%pushi/vec4 0, 0, 9;
%assign/vec4 v0000016babb7a440_0, 0;
%jmp T_0.1;
T_0.0 ;
%load/vec4 v0000016babb7a1c0_0;
%dup/vec4;
%pushi/vec4 0, 0, 3;
%cmp/u;
%jmp/1 T_0.2, 6;
%dup/vec4;
%pushi/vec4 1, 0, 3;
%cmp/u;
%jmp/1 T_0.3, 6;
%dup/vec4;
%pushi/vec4 2, 0, 3;
%cmp/u;
%jmp/1 T_0.4, 6;
%dup/vec4;
%pushi/vec4 3, 0, 3;
%cmp/u;
%jmp/1 T_0.5, 6;
%dup/vec4;
%pushi/vec4 4, 0, 3;
%cmp/u;
%jmp/1 T_0.6, 6;
%jmp T_0.7;
T_0.2 ;
%load/vec4 v0000016babb7a8a0_0;
%flag_set/vec4 8;
%jmp/0xz T_0.8, 8;
%pushi/vec4 1, 0, 3;
%assign/vec4 v0000016babb7a1c0_0, 0;
T_0.8 ;
%jmp T_0.7;
T_0.3 ;
%load/vec4 v0000016babb7a3a0_0;
%pad/u 32;
%cmpi/u 270, 0, 32;
%jmp/0xz T_0.10, 5;
%pushi/vec4 1, 0, 1;
%assign/vec4 v0000016babb7a120_0, 0;
%load/vec4 v0000016babb7a3a0_0;
%addi 1, 0, 9;
%assign/vec4 v0000016babb7a3a0_0, 0;
%jmp T_0.11;
T_0.10 ;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0000016babb7a120_0, 0;
%pushi/vec4 0, 0, 9;
%assign/vec4 v0000016babb7a3a0_0, 0;
%pushi/vec4 2, 0, 3;
%assign/vec4 v0000016babb7a1c0_0, 0;
T_0.11 ;
%jmp T_0.7;
T_0.4 ;
%load/vec4 v0000016babb7a080_0;
%flag_set/vec4 8;
%jmp/0xz T_0.12, 8;
%pushi/vec4 0, 0, 16;
%assign/vec4 v0000016babb7aee0_0, 0;
%pushi/vec4 3, 0, 3;
%assign/vec4 v0000016babb7a1c0_0, 0;
T_0.12 ;
%jmp T_0.7;
T_0.5 ;
%load/vec4 v0000016babb7a080_0;
%flag_set/vec4 8;
%jmp/0xz T_0.14, 8;
%load/vec4 v0000016babb7aee0_0;
%addi 1, 0, 16;
%assign/vec4 v0000016babb7aee0_0, 0;
%jmp T_0.15;
T_0.14 ;
%load/vec4 v0000016babb7aee0_0;
%pad/u 32;
%muli 1000, 0, 32;
%pushi/vec4 1566, 0, 32;
%div;
%pad/u 9;
%assign/vec4 v0000016babb7a440_0, 0;
%pushi/vec4 4, 0, 3;
%assign/vec4 v0000016babb7a1c0_0, 0;
T_0.15 ;
%jmp T_0.7;
T_0.6 ;
%pushi/vec4 0, 0, 3;
%assign/vec4 v0000016babb7a1c0_0, 0;
%jmp T_0.7;
T_0.7 ;
%pop/vec4 1;
T_0.1 ;
%jmp T_0;
.thread T_0;
.scope S_0000016babae67a0;
T_1 ;
%wait E_0000016babb1a860;
%load/vec4 v0000016babb0e7a0_0;
%pad/u 34;
%cmpi/u 2, 0, 34;
%flag_or 5, 4;
%jmp/0xz T_1.0, 5;
%pushi/vec4 63, 0, 6;
%store/vec4 v0000016babb0e8e0_0, 0, 6;
%jmp T_1.1;
T_1.0 ;
%load/vec4 v0000016babb0e7a0_0;
%pad/u 34;
%cmpi/u 71, 0, 34;
%flag_or 5, 4;
%jmp/0xz T_1.2, 5;
%pushi/vec4 62, 0, 6;
%store/vec4 v0000016babb0e8e0_0, 0, 6;
%jmp T_1.3;
T_1.2 ;
%load/vec4 v0000016babb0e7a0_0;
%pad/u 34;
%cmpi/u 140, 0, 34;
%flag_or 5, 4;
%jmp/0xz T_1.4, 5;
%pushi/vec4 60, 0, 6;
%store/vec4 v0000016babb0e8e0_0, 0, 6;
%jmp T_1.5;
T_1.4 ;
%load/vec4 v0000016babb0e7a0_0;
%pad/u 34;
%cmpi/u 209, 0, 34;
%flag_or 5, 4;
%jmp/0xz T_1.6, 5;
%pushi/vec4 56, 0, 6;
%store/vec4 v0000016babb0e8e0_0, 0, 6;
%jmp T_1.7;
T_1.6 ;
%load/vec4 v0000016babb0e7a0_0;
%pad/u 34;
%cmpi/u 278, 0, 34;
%flag_or 5, 4;
%jmp/0xz T_1.8, 5;
%pushi/vec4 48, 0, 6;
%store/vec4 v0000016babb0e8e0_0, 0, 6;
%jmp T_1.9;
T_1.8 ;
%load/vec4 v0000016babb0e7a0_0;
%pad/u 34;
%cmpi/u 347, 0, 34;
%flag_or 5, 4;
%jmp/0xz T_1.10, 5;
%pushi/vec4 32, 0, 6;
%store/vec4 v0000016babb0e8e0_0, 0, 6;
%jmp T_1.11;
T_1.10 ;
%pushi/vec4 0, 0, 6;
%store/vec4 v0000016babb0e8e0_0, 0, 6;
T_1.11 ;
T_1.9 ;
T_1.7 ;
T_1.5 ;
T_1.3 ;
T_1.1 ;
%jmp T_1;
.thread T_1, $push;
.scope S_0000016babb102e0;
T_2 ;
%delay 18500, 0;
%load/vec4 v0000016babb7abc0_0;
%inv;
%store/vec4 v0000016babb7abc0_0, 0, 1;
%jmp T_2;
.thread T_2;
.scope S_0000016babb102e0;
T_3 ;
%vpi_call 2 26 "$dumpfile", "top_ultrasonic_led.vcd" {0 0 0};
%vpi_call 2 27 "$dumpvars", 32'sb00000000000000000000000000000000, S_0000016babb102e0 {0 0 0};
%pushi/vec4 0, 0, 1;
%store/vec4 v0000016babb7abc0_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000016babb7a260_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000016babb7a620_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000016babb7ada0_0, 0, 1;
%delay 100000, 0;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000016babb7a260_0, 0, 1;
%delay 50000, 0;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000016babb7a620_0, 0, 1;
%delay 20000, 0;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000016babb7a620_0, 0, 1;
T_3.0 ;
%load/vec4 v0000016babb7a760_0;
%pad/u 32;
%pushi/vec4 1, 0, 32;
%cmp/e;
%flag_get/vec4 4;
%cmpi/ne 1, 0, 1;
%jmp/0xz T_3.1, 6;
%wait E_0000016babb0c320;
%jmp T_3.0;
T_3.1 ;
%vpi_call 2 44 "$display", "TRIG HIGH at %t", $time {0 0 0};
T_3.2 ;
%load/vec4 v0000016babb7a760_0;
%pad/u 32;
%pushi/vec4 0, 0, 32;
%cmp/e;
%flag_get/vec4 4;
%cmpi/ne 1, 0, 1;
%jmp/0xz T_3.3, 6;
%wait E_0000016babb0c320;
%jmp T_3.2;
T_3.3 ;
%vpi_call 2 46 "$display", "TRIG LOW at %t", $time {0 0 0};
%pushi/vec4 500, 0, 32;
T_3.4 %dup/vec4;
%cmpi/s 0, 0, 32;
%jmp/1xz T_3.5, 5;
%jmp/1 T_3.5, 4;
%subi 1, 0, 32;
%wait E_0000016babb0c2a0;
%jmp T_3.4;
T_3.5 ;
%pop/vec4 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000016babb7ada0_0, 0, 1;
%delay 18000000, 0;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000016babb7ada0_0, 0, 1;
%pushi/vec4 500, 0, 32;
T_3.6 %dup/vec4;
%cmpi/s 0, 0, 32;
%jmp/1xz T_3.7, 5;
%jmp/1 T_3.7, 4;
%subi 1, 0, 32;
%wait E_0000016babb0c2a0;
%jmp T_3.6;
T_3.7 ;
%pop/vec4 1;
%vpi_call 2 56 "$display", "LEDs allumer : %b", v0000016babb7a580_0 {0 0 0};
%vpi_call 2 58 "$finish" {0 0 0};
%end;
.thread T_3;
# The file index is used to find the file name in the following table.
:file_names 6;
"N/A";
"<interactive>";
"tb_top_ultrasonic_led.v";
"top_ultrasonic_led.v";
"Distance_display_led/distance_display_led.v";
"Ultrasonic/ultrasonic_fpga.v";