Gamenight77
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2b7582808e
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Update serial communication code: change COM port in read_rx.py and add ESP32 command interpretation in esp32_read.py
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2025-04-23 11:50:26 +02:00 |
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Gamenight77
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73cc201b6d
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Add README and project documentation for FPGA and ESP32 integration
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2025-04-22 16:46:03 +02:00 |
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Gamenight77
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8641f618f0
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Refactor uart_top module: streamline code structure and improve readability by removing unused variables and simplifying instantiation
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2025-04-22 15:44:04 +02:00 |
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Gamenight77
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5f3568ff9b
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Enhance ultrasonic_fpga module: add comment to clarify FSM behavior in the Verilog file
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2025-04-22 14:40:12 +02:00 |
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Gamenight77
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2be0cb20f6
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Refactor ultrasonic_fpga module: improve code readability by adjusting comments and formatting in the Verilog file.
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2025-04-22 14:38:50 +02:00 |
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Gamenight77
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3bb56e2f57
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Init et début de réflexion sur le projet
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2025-04-22 09:56:06 +02:00 |
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