verlan/Verilog_Louis
1
0
Fork 0
forked from tanchou/Verilog
Code Pull Requests Activity

Commit Graph

  • 0b764026a1 Add menu.py for weekly meal planning data main Gamenight77 2025-07-08 10:28:56 +02:00
  • ebe6cefda4 Update S4 Uart FIFO Louis TANCHOU 2025-06-05 15:59:12 +02:00
  • 20cbaace08 FPGA_ESP32_WIFI_Fonctionnel 3MB Louis TANCHOU 2025-06-03 09:04:26 +02:00
  • 3541476e9a vLundi juin Louis TANCHOU 2025-06-02 14:42:40 +02:00
  • 3f3e4fcd6b Update clock frequency in fpga_wifi_led module to 57.857142 MHz Gamenight77 2025-05-29 13:25:53 +02:00
  • 0f14bf24a6 Update PLL configuration in fpga_wifi_led module for Tang Nano 9K board Gamenight77 2025-05-29 10:44:03 +02:00
  • 778f4e2e57 Update UART baud rate to 500,000 in ESP32 and FPGA modules Gamenight77 2025-05-28 15:51:46 +02:00
  • 12ce0d38a7 Update UART baud rate to 1,000,000 in ESP32 and FPGA modules; adjust example command in connectESP.py Gamenight77 2025-05-28 14:47:38 +02:00
  • b2d280b4e2 Add connectESPV2.py for socket communication and hex input handling Gamenight77 2025-05-28 10:32:27 +02:00
  • 502999b159 Refactor LED handling in fpga_wifi_led module and remove obsolete readSerial.py script Gamenight77 2025-05-28 09:26:09 +02:00
  • 47de4a955b Update FPGA constraints and reintroduce WiFi functionality with touch sensor reset handling Gamenight77 2025-05-27 18:45:09 +02:00
  • 168431849b Code FPGA fonctionnel Gamenight77 2025-05-27 15:36:40 +02:00
  • 4e16bb3cbe Fix timer conditions in DHT11 state machine for signal detection Gamenight77 2025-05-27 13:45:58 +02:00
  • d69a0a4753 Adjust timer threshold for signal detection in DHT11 interface Gamenight77 2025-05-27 13:38:33 +02:00
  • 425cc8d00c Refactor DHT11 interface to support 16-bit temperature and humidity data, update checksum handling, and improve state machine logic Gamenight77 2025-05-27 13:34:59 +02:00
  • 286ba6b33c Enhance DHT11 interface and update measurement delay in top module Gamenight77 2025-05-27 12:51:00 +02:00
  • 68000def79 Remove unnecessary blank line in dht11_interface module Gamenight77 2025-05-27 10:31:52 +02:00
  • 7d7a6e16d8 Patch Gamenight77 2025-05-27 10:30:30 +02:00
  • 35f84d9d16 recodage de lundi Gamenight77 2025-05-27 10:12:31 +02:00
  • 92144d315e leds Louis TANCHOU 2025-05-26 11:19:03 +02:00
  • cac1a38dad Leds Louis TANCHOU 2025-05-26 11:18:25 +02:00
  • a02d6e7d22 init semaine 7 Gamenight77 2025-05-25 19:04:56 +02:00
  • 4c3e40b266 Refactor FIFO module: update pointer and count handling for improved functionality Louis TANCHOU 2025-05-22 14:49:36 +02:00
  • 54bf6df85b Add DHT11 UART communication module and related components Louis TANCHOU 2025-05-22 12:27:16 +02:00
  • a541e033d7 Refactor DHT11 model: update clock comment for clarity and adjust state machine comment formatting Gamenight77 2025-05-22 08:58:27 +02:00
  • 434381e9b6 Refactor DHT11 module and testbench: update timing parameters, adjust state machine, and correct simulation script paths Gamenight77 2025-05-21 18:11:28 +02:00
  • cbebf620d5 Add DHT11 interface and model, update testbench and scripts for simulation Louis TANCHOU 2025-05-20 15:55:21 +02:00
  • b3e646d854 Refactor ultrasonic modules and testbench for improved functionality and clarity Louis TANCHOU 2025-05-20 14:24:41 +02:00
  • 436edae734 Add ultrasonic sensor model and driver, update testbench and scripts Gamenight77 2025-05-19 11:42:28 +02:00
  • 9755b1b0a3 Refactor testbench by removing unused sensor distance checks and simplifying LED verification logic Gamenight77 2025-05-19 09:53:24 +02:00
  • 1006b77e95 Update testbench and simulation scripts to use a unified output file name for GTKWave Gamenight77 2025-05-19 09:31:53 +02:00
  • 75d1ff029b Semaine 6 init Gamenight77 2025-05-19 09:14:04 +02:00
  • 6ad0716f8f Fix path in build script and improve comments in testbench for ultrasonic commands Gamenight77 2025-05-16 17:06:57 +02:00
  • 933f38d071 Merge branch 'main' of https://grond.iut-fbleau.fr/tanchou/Verilog Gamenight77 2025-05-16 10:34:35 +02:00
  • e66a464812 Sa a l'air de fonctionner Gamenight77 2025-05-16 10:34:32 +02:00
  • 3569b55925 Refactor project scripts for Windows and Linux: update paths and create new scripts for build, clean, simulate, and GTKWave functionalities. Louis TANCHOU 2025-05-15 09:26:34 +02:00
  • abdc824c6d Script pour linux structure Louis TANCHOU 2025-05-15 09:23:21 +02:00
  • 861c9869f5 Add DHT11 interface and UART integration for ultrasonic sensor project Gamenight77 2025-05-14 14:40:16 +02:00
  • 6a5b90c8d1 Refactor DHT11 interface: change output wires to registers for data ready, busy, and error signals Gamenight77 2025-05-14 10:31:48 +02:00
  • 2a153aa1eb Enhance DHT11 interface: add start signal and busy output, improve FSM for better data handling Gamenight77 2025-05-14 10:27:46 +02:00
  • 1d6677d67d Init du DHT11 Interface Gamenight77 2025-05-14 09:22:07 +02:00
  • e124c7c0c4 Bloquer a cause du tx Gamenight77 2025-05-13 12:22:50 +02:00
  • d1f907f7b6 Remove unnecessary IDE configuration files from the Python test directory Gamenight77 2025-05-13 10:21:47 +02:00
  • b7d184d02f Gros patch sur la fifo et rx fifo pour gagner des tick d'horloge, uart comand fonctionne toujours pas Gamenight77 2025-05-13 10:21:28 +02:00
  • cca81f4db5 Fix formatting and update LED assignment in top_uart_ultrason_command module Gamenight77 2025-05-12 20:40:21 +02:00
  • 2cb68ce0d1 Debg compliqué Gamenight77 2025-05-12 15:34:02 +02:00
  • 790b85841b Refactor UART testbench for ultrasonic commands: improve readability and organization of code structure Gamenight77 2025-05-12 13:24:58 +02:00
  • 30bbe27510 ultrasonic commands commencer et tester mais non fonctionnel donc début de testbench pour pouvoir debuguer Gamenight77 2025-05-12 12:15:52 +02:00
  • 004def5ba2 Add README for UART loopback issue and delay explanation Gamenight77 2025-05-09 11:58:55 +02:00
  • e086ba8ef0 Loopback fifo fonctionne mais avec 3 valeur de décalage Gamenight77 2025-05-09 11:39:40 +02:00
  • 134df27937 Update README to include corrections and testing notes for FIFO and UART modules Gamenight77 2025-05-09 10:29:20 +02:00
  • 99e259f672 MAJ FIFO -> turn wire rd_data into register Gamenight77 2025-05-09 10:27:13 +02:00
  • cd14d82add patch Gamenight77 2025-05-09 09:20:56 +02:00
  • a162a2a1bb Update LED display logic to show received data instead of received signal Gamenight77 2025-05-09 09:15:44 +02:00
  • a792f85adf loopback fonctionne avec le rxuartlite Gamenight77 2025-05-09 09:15:28 +02:00
  • 93e0e96798 Add WAIT state to FSM and implement delay mechanism in UART module Gamenight77 2025-05-07 18:07:45 +02:00
  • 6bb42700f8 Update TX data assignment in UART loopback module to send fixed value Gamenight77 2025-05-07 18:05:02 +02:00
  • f990a6f6d3 Fix UART RX module instantiation and update build script for correct file references Gamenight77 2025-05-07 11:07:42 +02:00
  • 83c40bee28 Fix build script and update state machine in UART loopback module Gamenight77 2025-05-07 10:39:52 +02:00
  • ec1c69cf8f Implement UART and ultrasonic sensor integration with FIFO for data transmission Gamenight77 2025-05-07 10:27:17 +02:00
  • abef18227c Refactor UART FIFO implementation: update top-level module and integrate RX/TX FIFO functionality Gamenight77 2025-05-07 09:46:43 +02:00
  • 86d4f5ddd2 rx fifo et tx fifo on l'air de fonctionner lors des testbenchs Gamenight77 2025-05-06 10:59:08 +02:00
  • 1ca3456ab8 Création de la structure du uart fifo Gamenight77 2025-05-06 09:42:26 +02:00
  • aaebf22d48 Tb for fifo working fine Gamenight77 2025-05-06 09:14:59 +02:00
  • 1d39c68b5c Refactor uart_tx module to implement FIFO functionality with write and read pointers Gamenight77 2025-05-05 15:29:45 +02:00
  • 7156abf4e7 Add UART TX module and testbench, update scripts and constraints Gamenight77 2025-05-05 15:23:44 +02:00
  • e0a54fb42a Add LED indication for RX signal in top_uart_loopback module Gamenight77 2025-05-05 14:54:40 +02:00
  • 589c36ed83 Loopback ne fonctionne pas Gamenight77 2025-05-05 14:52:01 +02:00
  • 87732dcf87 uart modules work Gamenight77 2025-05-05 09:58:19 +02:00
  • fc48941459 uart_rx valid Gamenight77 2025-05-05 09:51:23 +02:00
  • c9a5fba97e TX tested with other's rx code (its work) Gamenight77 2025-05-05 09:26:41 +02:00
  • f5e73d7379 struct Gamenight77 2025-05-02 15:51:18 +02:00
  • 0faab53c30 uart v3 Gamenight77 2025-05-02 11:03:14 +02:00
  • 96c234de6d Add UART communication modules and testbenches Gamenight77 2025-04-28 17:13:39 +02:00
  • 596d47d356 Refactor ws2812_driver module for improved timing and data handling Gamenight77 2025-04-28 14:30:29 +02:00
  • 1811301ef2 Refactor ultrasonic_fpga and ultrasonic_sensor modules for improved functionality Gamenight77 2025-04-28 10:33:36 +02:00
  • 505f71974e New Week Gamenight77 2025-04-28 09:22:17 +02:00
  • a976fcb266 Implement code changes to enhance functionality and improve performance Gamenight77 2025-04-25 18:09:55 +02:00
  • 8c00b9d747 New TB for ultrasonic but not working fine Gamenight77 2025-04-25 10:51:44 +02:00
  • c6d33d278e Implement distance measurement and display modules: add ultrasonic sensor, FPGA logic, LED display, and WS2812 driver for enhanced distance visualization Gamenight77 2025-04-25 10:21:18 +02:00
  • eecf17f45d Refactor ultrasonic sensor module: implement echo signal handling and state management for improved distance measurement Gamenight77 2025-04-25 09:46:08 +02:00
  • bc7518a231 Refactor ultrasonic FPGA module: add echo_div_counter and distance_counter for improved distance measurement logic Gamenight77 2025-04-25 09:23:33 +02:00
  • d8708d1bd5 Refactor ultrasonic FPGA module: replace sig_in with sig_ok for improved signal handling and update ESP32 command processing to support new client list command Gamenight77 2025-04-25 09:17:22 +02:00
  • f2bcd7bc24 Refactor ESP32 communication: update packet structure, enhance frame reading, and implement command interpretation Gamenight77 2025-04-24 10:43:25 +02:00
  • 0eeecbca2e Enhance ESP32 command processing: add validation, error handling, and new command types for device management Gamenight77 2025-04-23 15:52:36 +02:00
  • 2b7582808e Update serial communication code: change COM port in read_rx.py and add ESP32 command interpretation in esp32_read.py Gamenight77 2025-04-23 11:50:26 +02:00
  • bd49b7949e Add WiFi access point functionality and client management to ESP32 code Gamenight77 2025-04-23 10:22:02 +02:00
  • 527b6585ff Add documentation section for ESP32 in README Gamenight77 2025-04-22 16:51:05 +02:00
  • 73cc201b6d Add README and project documentation for FPGA and ESP32 integration Gamenight77 2025-04-22 16:46:03 +02:00
  • 11b14ced36 Update Projet_esp32.txt: add architecture diagram and detailed descriptions for UART modules Gamenight77 2025-04-22 16:38:00 +02:00
  • 8641f618f0 Refactor uart_top module: streamline code structure and improve readability by removing unused variables and simplifying instantiation Gamenight77 2025-04-22 15:44:04 +02:00
  • 5f3568ff9b Enhance ultrasonic_fpga module: add comment to clarify FSM behavior in the Verilog file Gamenight77 2025-04-22 14:40:12 +02:00
  • 2be0cb20f6 Refactor ultrasonic_fpga module: improve code readability by adjusting comments and formatting in the Verilog file. Gamenight77 2025-04-22 14:38:50 +02:00
  • cb8b3c0c47 Readme Gamenight77 2025-04-22 14:34:54 +02:00
  • 574ace75ef Readme Gamenight77 2025-04-22 14:32:34 +02:00
  • 3bb56e2f57 Init et début de réflexion sur le projet Gamenight77 2025-04-22 09:56:06 +02:00
  • 39acfbe25b Copy modify and learn of the exemple code for uart on tang nano 20k Gamenight77 2025-04-18 11:37:51 +02:00
  • 65cf0e8232 Refactor UART testbench and top-level modules; remove old testbench files, enhance UART communication in top_ultrason_uart, and implement LED control via UART in top_led_uart. Add Python scripts for UART communication and data reading. Gamenight77 2025-04-17 18:00:54 +02:00
  • 897f829e40 Refactor ultrasonic_fpga module: update distance output and state handling; add top_ultrason_uart module for integration with UART and ultrasonic sensor Gamenight77 2025-04-17 13:02:47 +02:00
  • 8c1b452487 Update memo.png image file for UART module documentation Gamenight77 2025-04-17 10:59:33 +02:00