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forked from tanchou/Verilog
Commit Graph

79 Commits

Author SHA1 Message Date
3569b55925 Refactor project scripts for Windows and Linux: update paths and create new scripts for build, clean, simulate, and GTKWave functionalities. 2025-05-15 09:26:34 +02:00
abdc824c6d Script pour linux structure 2025-05-15 09:23:21 +02:00
Gamenight77
861c9869f5 Add DHT11 interface and UART integration for ultrasonic sensor project
- Created DHT11 interface in Verilog to handle communication with DHT11 sensor.
- Implemented LED control logic to indicate sensor status and data readiness.
- Added project scripts for building, cleaning, and simulating the design.
- Established constraints for FPGA pin assignments.
- Developed testbench for DHT11 UART communication.
- Updated README files to reflect project functionality and commands.
2025-05-14 14:40:16 +02:00
Gamenight77
6a5b90c8d1 Refactor DHT11 interface: change output wires to registers for data ready, busy, and error signals 2025-05-14 10:31:48 +02:00
Gamenight77
2a153aa1eb Enhance DHT11 interface: add start signal and busy output, improve FSM for better data handling 2025-05-14 10:27:46 +02:00
Gamenight77
1d6677d67d Init du DHT11 Interface 2025-05-14 09:22:07 +02:00
Gamenight77
e124c7c0c4 Bloquer a cause du tx 2025-05-13 12:22:50 +02:00
Gamenight77
d1f907f7b6 Remove unnecessary IDE configuration files from the Python test directory 2025-05-13 10:21:47 +02:00
Gamenight77
b7d184d02f Gros patch sur la fifo et rx fifo pour gagner des tick d'horloge, uart comand fonctionne toujours pas 2025-05-13 10:21:28 +02:00
Gamenight77
cca81f4db5 Fix formatting and update LED assignment in top_uart_ultrason_command module 2025-05-12 20:40:21 +02:00
Gamenight77
2cb68ce0d1 Debg compliqué 2025-05-12 15:34:02 +02:00
Gamenight77
790b85841b Refactor UART testbench for ultrasonic commands: improve readability and organization of code structure 2025-05-12 13:24:58 +02:00
Gamenight77
30bbe27510 ultrasonic commands commencer et tester mais non fonctionnel donc début de testbench pour pouvoir debuguer 2025-05-12 12:15:52 +02:00
Gamenight77
004def5ba2 Add README for UART loopback issue and delay explanation 2025-05-09 11:58:55 +02:00
Gamenight77
e086ba8ef0 Loopback fifo fonctionne mais avec 3 valeur de décalage 2025-05-09 11:39:40 +02:00
Gamenight77
134df27937 Update README to include corrections and testing notes for FIFO and UART modules 2025-05-09 10:29:20 +02:00
Gamenight77
99e259f672 MAJ FIFO -> turn wire rd_data into register 2025-05-09 10:27:13 +02:00
Gamenight77
cd14d82add patch 2025-05-09 09:20:56 +02:00
Gamenight77
a162a2a1bb Update LED display logic to show received data instead of received signal 2025-05-09 09:15:44 +02:00
Gamenight77
a792f85adf loopback fonctionne avec le rxuartlite 2025-05-09 09:15:28 +02:00
Gamenight77
93e0e96798 Add WAIT state to FSM and implement delay mechanism in UART module 2025-05-07 18:07:45 +02:00
Gamenight77
6bb42700f8 Update TX data assignment in UART loopback module to send fixed value 2025-05-07 18:05:02 +02:00
Gamenight77
f990a6f6d3 Fix UART RX module instantiation and update build script for correct file references 2025-05-07 11:07:42 +02:00
Gamenight77
83c40bee28 Fix build script and update state machine in UART loopback module 2025-05-07 10:39:52 +02:00
Gamenight77
ec1c69cf8f Implement UART and ultrasonic sensor integration with FIFO for data transmission 2025-05-07 10:27:17 +02:00
Gamenight77
abef18227c Refactor UART FIFO implementation: update top-level module and integrate RX/TX FIFO functionality 2025-05-07 09:46:43 +02:00
Gamenight77
86d4f5ddd2 rx fifo et tx fifo on l'air de fonctionner lors des testbenchs 2025-05-06 10:59:08 +02:00
Gamenight77
1ca3456ab8 Création de la structure du uart fifo 2025-05-06 09:42:26 +02:00
Gamenight77
aaebf22d48 Tb for fifo working fine 2025-05-06 09:14:59 +02:00
Gamenight77
1d39c68b5c Refactor uart_tx module to implement FIFO functionality with write and read pointers 2025-05-05 15:29:45 +02:00
Gamenight77
7156abf4e7 Add UART TX module and testbench, update scripts and constraints 2025-05-05 15:23:44 +02:00
Gamenight77
e0a54fb42a Add LED indication for RX signal in top_uart_loopback module 2025-05-05 14:54:40 +02:00
Gamenight77
589c36ed83 Loopback ne fonctionne pas 2025-05-05 14:52:01 +02:00
Gamenight77
87732dcf87 uart modules work 2025-05-05 09:58:19 +02:00
Gamenight77
fc48941459 uart_rx valid 2025-05-05 09:51:23 +02:00
Gamenight77
c9a5fba97e TX tested with other's rx code (its work) 2025-05-05 09:26:41 +02:00
Gamenight77
f5e73d7379 struct 2025-05-02 15:51:18 +02:00
Gamenight77
0faab53c30 uart v3 2025-05-02 11:03:14 +02:00
Gamenight77
96c234de6d Add UART communication modules and testbenches
- Implemented rx_fifo module for receiving data with FIFO management.
- Created tb_top_uart_rx_tx testbench for testing UART transmission and reception.
- Developed tb_uart_rx testbench for validating UART receiver functionality.
- Added tb_uart_tx testbench for testing UART transmitter behavior.
- Designed top_led_uart module to interface UART with LED outputs.
- Integrated top_uart_ultrasonic module for ultrasonic sensor data transmission via UART.
- Implemented tx_fifo module for transmitting data with FIFO management.
- Developed uart_rx module for receiving serial data with state machine control.
- Created uart_top module to connect RX and TX functionalities with FIFO buffers.
- Implemented uart_tx module for transmitting serial data with state machine control.
2025-04-28 17:13:39 +02:00
Gamenight77
596d47d356 Refactor ws2812_driver module for improved timing and data handling 2025-04-28 14:30:29 +02:00
Gamenight77
1811301ef2 Refactor ultrasonic_fpga and ultrasonic_sensor modules for improved functionality
- Initialized registers in ultrasonic_fpga to avoid undefined behavior.
- Modified state machine in ultrasonic_fpga to include a COMPUTE state for better echo measurement handling.
- Adjusted echo counting logic to ensure accurate distance calculation.
- Updated ultrasonic_sensor to allow for a more flexible trigger pulse timing by reducing the threshold for valid triggers.
2025-04-28 10:33:36 +02:00
Gamenight77
505f71974e New Week 2025-04-28 09:22:17 +02:00
Gamenight77
a976fcb266 Implement code changes to enhance functionality and improve performance 2025-04-25 18:09:55 +02:00
Gamenight77
8c00b9d747 New TB for ultrasonic but not working fine 2025-04-25 10:51:44 +02:00
Gamenight77
c6d33d278e Implement distance measurement and display modules: add ultrasonic sensor, FPGA logic, LED display, and WS2812 driver for enhanced distance visualization 2025-04-25 10:21:18 +02:00
Gamenight77
eecf17f45d Refactor ultrasonic sensor module: implement echo signal handling and state management for improved distance measurement 2025-04-25 09:46:08 +02:00
Gamenight77
bc7518a231 Refactor ultrasonic FPGA module: add echo_div_counter and distance_counter for improved distance measurement logic 2025-04-25 09:23:33 +02:00
Gamenight77
d8708d1bd5 Refactor ultrasonic FPGA module: replace sig_in with sig_ok for improved signal handling and update ESP32 command processing to support new client list command 2025-04-25 09:17:22 +02:00
Gamenight77
f2bcd7bc24 Refactor ESP32 communication: update packet structure, enhance frame reading, and implement command interpretation 2025-04-24 10:43:25 +02:00
Gamenight77
0eeecbca2e Enhance ESP32 command processing: add validation, error handling, and new command types for device management 2025-04-23 15:52:36 +02:00