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forked from tanchou/Verilog
Commit Graph

53 Commits

Author SHA1 Message Date
Gamenight77
86d4f5ddd2 rx fifo et tx fifo on l'air de fonctionner lors des testbenchs 2025-05-06 10:59:08 +02:00
Gamenight77
1ca3456ab8 Création de la structure du uart fifo 2025-05-06 09:42:26 +02:00
Gamenight77
aaebf22d48 Tb for fifo working fine 2025-05-06 09:14:59 +02:00
Gamenight77
1d39c68b5c Refactor uart_tx module to implement FIFO functionality with write and read pointers 2025-05-05 15:29:45 +02:00
Gamenight77
7156abf4e7 Add UART TX module and testbench, update scripts and constraints 2025-05-05 15:23:44 +02:00
Gamenight77
e0a54fb42a Add LED indication for RX signal in top_uart_loopback module 2025-05-05 14:54:40 +02:00
Gamenight77
589c36ed83 Loopback ne fonctionne pas 2025-05-05 14:52:01 +02:00
Gamenight77
87732dcf87 uart modules work 2025-05-05 09:58:19 +02:00
Gamenight77
fc48941459 uart_rx valid 2025-05-05 09:51:23 +02:00
Gamenight77
c9a5fba97e TX tested with other's rx code (its work) 2025-05-05 09:26:41 +02:00
Gamenight77
f5e73d7379 struct 2025-05-02 15:51:18 +02:00
Gamenight77
0faab53c30 uart v3 2025-05-02 11:03:14 +02:00
Gamenight77
96c234de6d Add UART communication modules and testbenches
- Implemented rx_fifo module for receiving data with FIFO management.
- Created tb_top_uart_rx_tx testbench for testing UART transmission and reception.
- Developed tb_uart_rx testbench for validating UART receiver functionality.
- Added tb_uart_tx testbench for testing UART transmitter behavior.
- Designed top_led_uart module to interface UART with LED outputs.
- Integrated top_uart_ultrasonic module for ultrasonic sensor data transmission via UART.
- Implemented tx_fifo module for transmitting data with FIFO management.
- Developed uart_rx module for receiving serial data with state machine control.
- Created uart_top module to connect RX and TX functionalities with FIFO buffers.
- Implemented uart_tx module for transmitting serial data with state machine control.
2025-04-28 17:13:39 +02:00
Gamenight77
596d47d356 Refactor ws2812_driver module for improved timing and data handling 2025-04-28 14:30:29 +02:00
Gamenight77
1811301ef2 Refactor ultrasonic_fpga and ultrasonic_sensor modules for improved functionality
- Initialized registers in ultrasonic_fpga to avoid undefined behavior.
- Modified state machine in ultrasonic_fpga to include a COMPUTE state for better echo measurement handling.
- Adjusted echo counting logic to ensure accurate distance calculation.
- Updated ultrasonic_sensor to allow for a more flexible trigger pulse timing by reducing the threshold for valid triggers.
2025-04-28 10:33:36 +02:00
Gamenight77
505f71974e New Week 2025-04-28 09:22:17 +02:00
Gamenight77
a976fcb266 Implement code changes to enhance functionality and improve performance 2025-04-25 18:09:55 +02:00
Gamenight77
8c00b9d747 New TB for ultrasonic but not working fine 2025-04-25 10:51:44 +02:00
Gamenight77
c6d33d278e Implement distance measurement and display modules: add ultrasonic sensor, FPGA logic, LED display, and WS2812 driver for enhanced distance visualization 2025-04-25 10:21:18 +02:00
Gamenight77
eecf17f45d Refactor ultrasonic sensor module: implement echo signal handling and state management for improved distance measurement 2025-04-25 09:46:08 +02:00
Gamenight77
bc7518a231 Refactor ultrasonic FPGA module: add echo_div_counter and distance_counter for improved distance measurement logic 2025-04-25 09:23:33 +02:00
Gamenight77
d8708d1bd5 Refactor ultrasonic FPGA module: replace sig_in with sig_ok for improved signal handling and update ESP32 command processing to support new client list command 2025-04-25 09:17:22 +02:00
Gamenight77
f2bcd7bc24 Refactor ESP32 communication: update packet structure, enhance frame reading, and implement command interpretation 2025-04-24 10:43:25 +02:00
Gamenight77
0eeecbca2e Enhance ESP32 command processing: add validation, error handling, and new command types for device management 2025-04-23 15:52:36 +02:00
Gamenight77
2b7582808e Update serial communication code: change COM port in read_rx.py and add ESP32 command interpretation in esp32_read.py 2025-04-23 11:50:26 +02:00
Gamenight77
bd49b7949e Add WiFi access point functionality and client management to ESP32 code 2025-04-23 10:22:02 +02:00
Gamenight77
527b6585ff Add documentation section for ESP32 in README 2025-04-22 16:51:05 +02:00
Gamenight77
73cc201b6d Add README and project documentation for FPGA and ESP32 integration 2025-04-22 16:46:03 +02:00
Gamenight77
11b14ced36 Update Projet_esp32.txt: add architecture diagram and detailed descriptions for UART modules 2025-04-22 16:38:00 +02:00
Gamenight77
8641f618f0 Refactor uart_top module: streamline code structure and improve readability by removing unused variables and simplifying instantiation 2025-04-22 15:44:04 +02:00
Gamenight77
5f3568ff9b Enhance ultrasonic_fpga module: add comment to clarify FSM behavior in the Verilog file 2025-04-22 14:40:12 +02:00
Gamenight77
2be0cb20f6 Refactor ultrasonic_fpga module: improve code readability by adjusting comments and formatting in the Verilog file. 2025-04-22 14:38:50 +02:00
Gamenight77
cb8b3c0c47 Readme 2025-04-22 14:34:54 +02:00
Gamenight77
574ace75ef Readme 2025-04-22 14:32:34 +02:00
Gamenight77
3bb56e2f57 Init et début de réflexion sur le projet 2025-04-22 09:56:06 +02:00
Gamenight77
39acfbe25b Copy modify and learn of the exemple code for uart on tang nano 20k 2025-04-18 11:37:51 +02:00
Gamenight77
65cf0e8232 Refactor UART testbench and top-level modules; remove old testbench files, enhance UART communication in top_ultrason_uart, and implement LED control via UART in top_led_uart. Add Python scripts for UART communication and data reading. 2025-04-17 18:00:54 +02:00
Gamenight77
897f829e40 Refactor ultrasonic_fpga module: update distance output and state handling; add top_ultrason_uart module for integration with UART and ultrasonic sensor 2025-04-17 13:02:47 +02:00
Gamenight77
8c1b452487 Update memo.png image file for UART module documentation 2025-04-17 10:59:33 +02:00
Gamenight77
55f9161dfa Add UART transmitter module and testbench
- Implemented the uart_tx module for UART transmission with configurable clock frequency and baud rate.
- Added a testbench (uart_tx_tb) to verify the functionality of the uart_tx module, including signal generation for start, data, and clock.
- Created a backup of the previous testbench (uart_tx_tb_old) for reference.
2025-04-17 10:56:16 +02:00
Gamenight77
d46530f32d Add memo.png image file for UART module documentation 2025-04-17 09:08:24 +02:00
Gamenight77
fd09bb30e3 Add distance_ws2812_display module and testbench; implement ws2812_driver for LED control 2025-04-16 17:07:29 +02:00
Gamenight77
6dfd8768a0 Add testbench for top_ultrasonic_led module
- Created a new testbench file `top_ultrasonic_led_tb.vvp` to simulate the functionality of the `top_ultrasonic_led` module.
- Included necessary signal definitions and event triggers for clock, reset, start, echo, and trigger signals.
- Implemented a state machine to handle the ultrasonic measurement process and LED display logic.
- Added simulation parameters for distance measurement and LED control.
- Integrated VPI calls for waveform dumping and simulation control.
2025-04-16 14:58:04 +02:00
Gamenight77
7a2fbc0195 Add testbench for top_ultrasonic_led module
- Created a new testbench file `top_ultrasonic_led_tb.vvp` to simulate the `top_ultrasonic_led` module.
- Defined the necessary signals and events for testing the ultrasonic sensor functionality.
- Implemented the main test sequence including triggering the ultrasonic sensor and monitoring the output LEDs based on distance measurements.
- Included timing and state management for accurate simulation of the ultrasonic sensor behavior.
2025-04-16 14:23:18 +02:00
Gamenight77
079159bdb8 Refactor distance data type from 15 bits to 9 bits in ultrasonic_fpga module and update related testbench for consistency 2025-04-16 14:03:48 +02:00
Gamenight77
a00122b595 Fix clock period comment in testbench for clarity 2025-04-16 13:32:08 +02:00
Gamenight77
c8f108e01d Add Ultrasonic FPGA module and simulation testbench
- Implemented the ultrasonic_fpga module to handle ultrasonic sensor operations including triggering and measuring distance.
- Added a simulation testbench (ultrasonic_sim) to validate the functionality of the ultrasonic_fpga module.
- The module includes state management for triggering the sensor and measuring the echo duration to calculate distance.
- Simulation includes initialization, triggering the sensor, and checking the output distance.
2025-04-16 13:30:41 +02:00
Gamenight77
66fa5b2650 Add initial design files for 27 MHz clock counter
- Created tangnano20k.cst to define I/O locations for clock, button, and LEDs.
- Implemented top.v module to instantiate the counter with clock and button inputs, and 4-bit count output.
2025-04-15 08:59:40 +02:00
Gamenight77
7c09418828 Training exercise 2025-03-22 18:44:25 +01:00
e651a94dbe First simulation 2025-03-22 10:19:11 +01:00